AMMC: advance multi-core memory controller
Tipus de documentComunicació de congrés
EditorInstitute of Electrical and Electronics Engineers (IEEE)
Condicions d'accésAccés obert
In this work, we propose an efficient scheduler and intelligent memory manager known as AMMC (Advanced Multi-Core Memory Controller), which proficiently handles data movement and computational tasks. The proposed AMMC system improves performance by managing complex data transfers at run-time and scheduling multi-cores without the intervention of a control processor nor an operating system. AMMC has been coupled with a heterogeneous system that provides both general-purpose cores and application specific accelerators. The AMMC system is implemented and tested on a Xilinx ML505 evaluation FPGA board. The performance of the system is compared with a microprocessor based system that has been integrated with the Xilkernel operating system. Results show that the AMMC based multi-core system consumes 48% less hardware resources, 27.9% less on-chip power and achieves 6.8x of speed-up compared to the MicroBlaze-based multi-core system.
CitacióHussain, T. [et al.]. AMMC: advance multi-core memory controller. A: International Conference on Field-Programmable Technology. "Proceedings of the 2014 International Conference on Field-Programmable Technology (FPT): Dec. 10-12, 2014: Shanghai, China". Shanghai: Institute of Electrical and Electronics Engineers (IEEE), 2014, p. 292-295.
Versió de l'editorhttp://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7082802&tag=1