HPC system software for regular and irregular parallel applications
Tipus de documentText en actes de congrés
EditorInstitute of Electrical and Electronics Engineers (IEEE)
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The upcoming generation of system software for High Performance Computing is expected to provide a richer set of functionalities without compromising application performance. This Ph.D. thesis addresses the problem of designing scalable system software for both regular and irregular applications. The contributions are two-fold. First, we evaluate the drawbacks of current HPC system software for regular applications. We describe a methodology to precisely measure jitter on a general-purpose OS. Considering a lightweight operating system (IBM CNK), we analyze the overhead of adding support for a missing feature such as dynamic memory management. Second, we focus on irregular applications and build a specialized runtime system to enhance this kind of applications on common HPC flop intensive systems. The proposed runtime system provides a global address space abstraction of a distributed memory machine combined with a transparent fork/join execution model and it also includes lightweight multithreading and network message aggregation.
CitacióMorari, A.; Valero, M. HPC system software for regular and irregular parallel applications. A: IEEE International Parallel and Distributed Processing Symposium. "IEEE 27th International Parallel and Distributed Processing Symposium Workshops and PhD Forum: 20–24 May 2013, Boston, Massachusetts: proceedings". Boston, MA: Institute of Electrical and Electronics Engineers (IEEE), 2013, p. 2242-2245.
Versió de l'editorhttp://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6651140