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The use of digital image processing for IC reverse engineering
dc.contributor.author | Quijada Ferrero, Raúl |
dc.contributor.author | Raventós Mayoral, Arnau |
dc.contributor.author | Tarrés Ruiz, Francisco |
dc.contributor.author | Dura, Roger |
dc.contributor.author | Hidalgo, Salvador |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament de Teoria del Senyal i Comunicacions |
dc.date.accessioned | 2014-12-23T15:19:22Z |
dc.date.created | 2014 |
dc.date.issued | 2014 |
dc.identifier.citation | Quijada, R. [et al.]. The use of digital image processing for IC reverse engineering. A: International Multi-Conference on Systems, Signals and Devices. "11th International Multi-Conference on Systems, Signals and Devices: February 11-14, 2014: Castelldefels-Barcelona, Spain". Castelldefels, Barcelona: Institute of Electrical and Electronics Engineers (IEEE), 2014, p. 1-4. |
dc.identifier.isbn | 978-1-4799-3865-0 |
dc.identifier.uri | http://hdl.handle.net/2117/25136 |
dc.description.abstract | IC Reverse engineering is the process to analyze an integrated circuit to obtain information about its design, materials, logic circuitry, functionality, performance and other relevant features. The increasingly complexity of microchips using a greater number of layers and logic gates makes this process unaffordable when using traditional methods that rely on human inspection and analysis. Therefore, digital image processing is presented as a fruitful field for automation. In this paper a system for the circuitry extraction, analysis and presentation is described. It is divided in three blocks: 2D Image Tiling, Logic Gates Localization & Recognition and Microchip Navigator. The paper presents an overview of the complete system and is mainly based on the description of the image processing algorithms that are applied to the different blocks such as image stitching, customized Scale Invariant Feature Transform (SIFT) and logic gate localization & recognition. |
dc.format.extent | 4 p. |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.subject | Àrees temàtiques de la UPC::So, imatge i multimèdia::Dispositius de so, imatge i multimèdia |
dc.subject | Àrees temàtiques de la UPC::Enginyeria de la telecomunicació |
dc.subject.lcsh | Image processing--Digital techniques |
dc.subject.lcsh | Reverse engineering |
dc.subject.other | IC reverse engineering |
dc.subject.other | Image stitching |
dc.subject.other | Mosaicing |
dc.subject.other | Object recognition |
dc.title | The use of digital image processing for IC reverse engineering |
dc.type | Conference report |
dc.subject.lemac | Imatges digitals |
dc.subject.lemac | Enginyeria inversa |
dc.contributor.group | Universitat Politècnica de Catalunya. DMAG - Grup d'Aplicacions Multimèdia Distribuïdes |
dc.identifier.doi | 10.1109/SSD.2014.6808796 |
dc.description.peerreviewed | Peer Reviewed |
dc.rights.access | Restricted access - publisher's policy |
local.identifier.drac | 14957864 |
dc.description.version | Postprint (published version) |
dc.date.lift | 10000-01-01 |
local.citation.author | Quijada, R.; Raventos, A.; Tarres, F.; Dura, R.; Hidalgo, S. |
local.citation.contributor | International Multi-Conference on Systems, Signals and Devices |
local.citation.pubplace | Castelldefels, Barcelona |
local.citation.publicationName | 11th International Multi-Conference on Systems, Signals and Devices: February 11-14, 2014: Castelldefels-Barcelona, Spain |
local.citation.startingPage | 1 |
local.citation.endingPage | 4 |