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dc.contributor.authorBellens, Pieter
dc.contributor.authorPérez Cáncer, Josep Maria
dc.contributor.authorBadia Sala, Rosa Maria
dc.contributor.authorLabarta Mancho, Jesús José
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2014-11-27T13:36:08Z
dc.date.created2009
dc.date.issued2009
dc.identifier.citationBellens, P. [et al.]. Just-in-time renaming and lazy write-back on the Cell/B.E.. A: International Workshop on Parallel Programming Models and Systems Software for High-End Computing. "2009 International Conference on Parallel Processing workshops (ICPPW 2009): Vienna, Austria: 22-25 September 2009". Viena: Institute of Electrical and Electronics Engineers (IEEE), 2009, p. 138-145.
dc.identifier.isbn978-1-4244-4923-1
dc.identifier.urihttp://hdl.handle.net/2117/24873
dc.description.abstractCell Superscalar (CellSs) provides a simple, flexible and easy programming approach for the Cell Broadband Engine (Cell/B.E.) that automatically exploits the inherent concurrency of applications at a function or task level. The CellSs environment is based on a source-to-source compiler that translates annotated C or Fortran code and a runtime library tailored for the Cell/B.E. that orchestrates the concurrent execution of the application. We have developed a technique called bypassing that allows CellSs to perform core-to-core DMA transfers for generic applications. In this overview paper we concisely summarise the bypassing practice and introduce two improvements: just-in-time renaming and lazy write-back. These extensions come at no additional cost and potentially increase performance by improving the perceived bandwidth of the Element Interconnect Bus (EIB). Although the integration of bypassing with CellSs is work in progress we present results for four fundamental linear algebra kernels to demonstrate the applicability of these techniques and quantify the benefit that can be reaped.
dc.format.extent8 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles
dc.subjectÀrees temàtiques de la UPC::Matemàtiques i estadística::Àlgebra::Àlgebra lineal i multilineal
dc.subject.lcshParallel programming (Computer science)
dc.subject.lcshMicrocomputers
dc.subject.otherMicrocomputers
dc.subject.otherMultiprocessing systems
dc.subject.otherParallel processing
dc.subject.otherCell/B.E
dc.subject.otherFortran code translation
dc.subject.otherBypassing technique
dc.subject.otherCell broadband engine
dc.subject.otherCell superscalar
dc.subject.otherCore-to-core DMA transfer
dc.subject.otherElement interconnect bus
dc.subject.otherFundamental linear algebra kernels
dc.subject.otherJust-in-time renaming
dc.subject.otherLazy write back
dc.subject.otherSource-to-source compiler
dc.subject.otherCell/B.E.
dc.subject.otherBandwidth
dc.subject.otherMulti-core
dc.subject.otherProgramming tools
dc.subject.otherTemporal locality
dc.subject.otherApplication software
dc.subject.otherAutomatic programming
dc.subject.otherConcurrent computing
dc.subject.otherEngines
dc.subject.otherFunctional programming
dc.subject.otherLinear algebra
dc.subject.otherParallel programming
dc.subject.otherRuntime
dc.titleJust-in-time renaming and lazy write-back on the Cell/B.E.
dc.typeConference report
dc.subject.lemacProgramació en paral·lel (Informàtica)
dc.subject.lemacMicroordinadors
dc.contributor.groupUniversitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.identifier.doi10.1109/ICPPW.2009.55
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5363155&tag=1
dc.rights.accessRestricted access - publisher's policy
local.identifier.drac15117192
dc.description.versionPostprint (published version)
dc.date.lift10000-01-01
local.citation.authorBellens, P.; Perez, Josep M.; Badia, R.M.; Labarta, J.
local.citation.contributorInternational Workshop on Parallel Programming Models and Systems Software for High-End Computing
local.citation.pubplaceViena
local.citation.publicationName2009 International Conference on Parallel Processing workshops (ICPPW 2009): Vienna, Austria: 22-25 September 2009
local.citation.startingPage138
local.citation.endingPage145


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