Stand-alone memory controller for graphics system
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There has been a dramatic increase in the complexity of graphics applications in System-on-Chip (SoC) with a corresponding increase in performance requirements. Various powerful and expensive platforms to support graphical applications appeared recently. All these platforms require a high performance core that manages and schedules the high speed data of graphics peripherals (camera, display, etc.) and an efficient on chip scheduler. In this article we design and propose a SoC based Programmable Graphics Controller (PGC) that handles graphics peripherals efficiently. The data access patterns are described in the pro- gram memory; the PGC reads them, generates transactions and manages both bus and connected peripherals without the support of a master core. The proposed system is highly reliable in terms of cost, performance and power. The PGC based system is implemented and tested on a Xilinx ML505 FPGA board. The performance of the PGC is compared with the Microblaze processor based graphic system. When compared with the baseline system, the results show that the PGC captures video at 2x of higher frame rate and achieves 3.4x to 7.4x of speedup while process- ing images. PGC consumes 30% less hardware resources and 22% less on-chip power than the baseline system.
CitacióHussain, T. [et al.]. Stand-alone memory controller for graphics system. A: International Symposium on Applied Reconfigurable Computing. "Reconfigurable computing: architectures, tools, and applications: 10th International Symposium, ARC 2014: Vilamoura, Portugal: April 14-16, 2014: proceedings". Vilamoura, Porto: Springer, 2014, p. 108-120.
Versió de l'editorhttp://link.springer.com/chapter/10.1007%2F978-3-319-05960-0_10
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