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dc.contributor.authorBradley, Mark
dc.contributor.authorAlarcón Cot, Eduardo José
dc.contributor.authorFeely, Orla
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.date.accessioned2014-05-07T13:45:02Z
dc.date.created2014-04-01
dc.date.issued2014-04-01
dc.identifier.citationBradley, M.; Alarcon, E.; Feely, O. Design-oriented analysis of quantization-induced limit cycles in a multiple-sampled digitally controlled buck converter. "IEEE transactions on circuits and systems I: regular papers", 01 Abril 2014, vol. 61, núm. 4, p. 1192-1205.
dc.identifier.issn1549-8328
dc.identifier.urihttp://hdl.handle.net/2117/22888
dc.description.abstractDigital control of switching power converters is an area which has seen increased attention in recent years. However, quantization in the feedback loop from the analog-to-digital (A/D) converter and the digital pulse width modulator (DPWM) may cause limit cycle oscillations to manifest, which are generally seen as being undesirable. This paper presents an analysis of the limit cycle behavior found in a multiple-sampled digitally controlled buck converter. The limit cycles which may arise in the system are characterized and conditions to prevent these oscillations from occurring are presented. © 2004-2012 IEEE.
dc.format.extent14 p.
dc.language.isoeng
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica::Electrònica de potència
dc.subject.lcshDigital control system
dc.subject.lcshVoltage-controlled oscillators
dc.subject.otherDC-DC power converters
dc.subject.otherDigital control
dc.subject.otherLimit cycles
dc.subject.otherNonlinear dynamics
dc.subject.otherQuantization
dc.titleDesign-oriented analysis of quantization-induced limit cycles in a multiple-sampled digitally controlled buck converter
dc.typeArticle
dc.subject.lemacControl digital
dc.subject.lemacOscil·ladors de voltatge controlat
dc.contributor.groupUniversitat Politècnica de Catalunya. EPIC - Energy Processing and Integrated Circuits
dc.identifier.doi10.1109/TCSI.2013.2283671
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6642152
dc.rights.accessRestricted access - publisher's policy
local.identifier.drac14576791
dc.description.versionPostprint (published version)
dc.date.lift10000-01-01
local.citation.authorBradley, M.; Alarcon, E.; Feely, O.
local.citation.publicationNameIEEE transactions on circuits and systems I: regular papers
local.citation.volume61
local.citation.number4
local.citation.startingPage1192
local.citation.endingPage1205


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