Output–Capacitorless CMOS LDO Regulator Based on High Slew–rate current-mode transconductance amplifier
Document typeConference lecture
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Rights accessRestricted access - publisher's policy
A low quiescent current output-capacitorless CMOS LDO regulator based on a high slew-rate current-mode transconductance amplifier (CTA) as an error amplifier is presented. Load transient characteristic of the proposed LDO is improved even at low quiescent currents, by using a local common-mode feedback (LCMFB) in the proposed CTA. This provides an increase in the order of transfer characteristic of the circuit, thereby enhancing the slew-rate at the gate of pass transistor. The proposed CTA-based LDO topology has been designed and post-layout simulated in HSPICE, in a 0.18 µm CMOS process to supply a load current between 0-100 mA. Postlayout simulation results reveal that the proposed LDO is stable without any internal compensation strategy and with on-chip output capacitor or lumped parasitic capacitances at the output node between 10-100 pF.
CitationSaberkari, A. [et al.]. Output–Capacitorless CMOS LDO Regulator Based on High Slew–rate current-mode transconductance amplifier. A: IEEE International Symposium on Circuits and Systems. "IEEE International Symposium on Circuits and Systems (ISCAS), 2013: 19- 23 May 2013, Beijing, China". Beijing-Pekín: Institute of Electrical and Electronics Engineers (IEEE), 2013, p. 1484-1487.
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