Impact of finfet and III-V/Ge technology on logic and memory cell behavior
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In this work, we assess the performance of a ring oscillator and a DRAM cell when they are implemented with different technologies (planar CMOS, FinFET and III-V MOSFETs), and subjected to different reliability scenarios (variability and soft errors). FinFET-based circuits show the highest robustness against variability and soft error environments.
CitationAmat, E. [et al.]. Impact of finfet and III-V/Ge technology on logic and memory cell behavior. "IEEE transactions on device and materials reliability", 20 Novembre 2013, vol. 14, núm. 1, p. 1-15.
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