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dc.contributor.authorManich Bou, Salvador
dc.contributor.authorWamser, Markus S.
dc.contributor.authorSigl, Georg
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.date.accessioned2014-01-02T16:38:55Z
dc.date.created2013
dc.date.issued2013
dc.identifier.citationManich, S.; S. Wamser, M.; Sigl, G. Information Leakage Reduction at the Scan-Path Output. A: Conference on Design of Circuits and Integrated Systems. "Proceedings of the XXVII Conference on Design of Circuits and Integrated Systems". Donostia - San Sebastian: 2013, p. 1-6.
dc.identifier.isbn978-84-8081-401-0
dc.identifier.urihttp://hdl.handle.net/2117/21136
dc.description.abstractIn this paper we present a new scan-path structure for improving the security of systems including a scan path, which normally introduces a security critical information channel into a design. The structure, named differential scan path (DiSP), divides the internal state of the scan path into two sections. During shift-out operation, only subtraction of the two sections is provided. The discovery of the internal state from this subtraction requires guesswork that increases exponentially with scan path length. Subtraction does not preserve parity, a property sometimes used during attacks. Output subtraction cannot be reversed and hence it is not possible to restore the internal state of the chip from the output. The structure is simple, requires little area and no unlocking keys.
dc.format.extent6 p.
dc.language.isoeng
dc.subjectÀrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
dc.subject.lcshIntegrated circuits
dc.subject.othersecurity
dc.subject.othertestability
dc.subject.otherscan path
dc.subject.otherattack
dc.subject.othersmart-card
dc.subject.otherbilbo.
dc.titleInformation Leakage Reduction at the Scan-Path Output
dc.typeConference report
dc.subject.lemacCircuits integrats -- Testeig
dc.contributor.groupUniversitat Politècnica de Catalunya. QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat
dc.rights.accessRestricted access - publisher's policy
local.identifier.drac12934428
dc.description.versionPostprint (published version)
dc.date.lift10000-01-01
local.citation.authorManich, S.; S. Wamser, M.; Sigl, G.
local.citation.contributorConference on Design of Circuits and Integrated Systems
local.citation.pubplaceDonostia - San Sebastian
local.citation.publicationNameProceedings of the XXVII Conference on Design of Circuits and Integrated Systems
local.citation.startingPage1
local.citation.endingPage6


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