Output-Capacitorless CMOS LDO Regulator Based on High Slew-Rate Current-Mode Transconductance Amplifier
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Cita com:
hdl:2117/20578
Tipus de documentComunicació de congrés
Data publicació2013
EditorInstitute of Electrical and Electronics Engineers (IEEE)
Condicions d'accésAccés obert
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continguts d'aquesta obra estan subjectes a la llicència de Creative Commons
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Reconeixement-NoComercial-SenseObraDerivada 3.0 Espanya
Abstract
A low quiescent current output-capacitorless CMOS LDO regulator based on a high slew-rate current-mode transconductance amplifier (CTA) as an error amplifier is presented. Load transient characteristic of the proposed LDO is improved even at low quiescent currents, by using a local
common-mode feedback (LCMFB) in the proposed CTA. This provides an increase in the order of transfer characteristic of the circuit, thereby enhancing the slew-rate at the gate of pass transistor. The proposed CTA-based LDO topology has been designed and post-layout simulated in HSPICE, in a 0.18 μm
CMOS process to supply a load current between 0-100 mA. Postlayout simulation results reveal that the proposed LDO is stable without any internal compensation strategy and with on-chip output capacitor or lumped parasitic capacitances at the output node between 10-100 pF.
CitacióSaberkari, A. [et al.]. Output-Capacitorless CMOS LDO Regulator Based on High Slew-Rate Current-Mode Transconductance Amplifier. A: IEEE International Symposium on Circuits and Systems. "IEEE International Symposium on Circuits and Systems (ISCAS), 2013: 19- 23 May 2013, Beijing, China". Beijing-Pekín: Institute of Electrical and Electronics Engineers (IEEE), 2013, p. 1484-1487.
ISBN978-146-735-760-9
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