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dc.contributor.authorSuñé, Víctor
dc.contributor.authorRodríguez Montañés, Rosa
dc.contributor.authorCarrasco, Juan A.
dc.contributor.authorMunteanu, D-P
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.date.accessioned2013-08-01T08:00:55Z
dc.date.available2013-08-01T08:00:55Z
dc.date.created2003
dc.date.issued2003
dc.identifier.citationSuñe, V. [et al.]. A combinatorial method for the evaluation of yield of fault-tolerant systems-on-chip. A: IEEE/IFIP International Conference on Dependable Systems and Networks. "Proc. IEEE Int. Conf. on Dependable Systems and Networks". 2003, p. 563-572.
dc.identifier.urihttp://hdl.handle.net/2117/20054
dc.description.abstractIn this paper we develop a combinatorial method for the evaluation of yield of fault-tolerant systems-on-chip. The method assumes that defects are produced according to a model in which defects are lethal and affect given components of the system following a distribution common to all defects. The distribution of the number of defects is arbitrary. The method is based on the formulation of the yield as 1 minus the probability that a given boolean function with multiple-valued variables has value 1. That probability is computed by analyzing a ROMDD (reduced ordered multiple-valuedecision diagram) representation of the function. For efficiency reasons, we first build a coded ROBDD (reduced ordered binary decision diagram) representation of the function and then transform that coded ROBDD into the ROMDD required by the method. We present numerical experiments showing that the method is able to cope with quite large systems in moderate CPU times.
dc.format.extent10 p.
dc.language.isoeng
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Matemàtiques i estadística::Estadística matemàtica
dc.subject.lcshCombinatorial analysis
dc.titleA combinatorial method for the evaluation of yield of fault-tolerant systems-on-chip
dc.typeConference report
dc.subject.lemacAnàlisi combinatòria
dc.contributor.groupUniversitat Politècnica de Catalunya. QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat
dc.rights.accessOpen Access
local.identifier.drac2384215
dc.description.versionPostprint (published version)
local.citation.authorSuñe, V.; Rodriguez, R.; Carrasco, J.; Munteanu, D.-P.
local.citation.contributorIEEE/IFIP International Conference on Dependable Systems and Networks
local.citation.publicationNameProc. IEEE Int. Conf. on Dependable Systems and Networks
local.citation.startingPage563
local.citation.endingPage572


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