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DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware support
dc.contributor.author | Pavlou, Demos |
dc.contributor.author | Gibert Codina, Enric |
dc.contributor.author | Latorre, Fernando |
dc.contributor.author | González Colás, Antonio María |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
dc.date.accessioned | 2013-05-10T12:30:37Z |
dc.date.created | 2011 |
dc.date.issued | 2012 |
dc.identifier.citation | Pavlou, D. [et al.]. DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware support. A: ACM SIGPLAN/SIGOPS Conference on Virtual Execution Environments. "VEE'12 - Proceedings of the ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments". 2012, p. 159-168. |
dc.identifier.isbn | 978-145031175-5 |
dc.identifier.uri | http://hdl.handle.net/2117/19158 |
dc.description.abstract | Dynamic Binary Translators (DBT) and Dynamic Binary Opti- mization (DBO) by software are used widely for several reasons including performance, design simplification and virtualization. However, the software layer in such systems introduces non- negligible overheads which affect performance and user experi- ence. Hence, reducing DBT/DBO overheads is of paramount im- portance. In addition, reduced overheads have interesting collateral effects in the rest of the software layer, such as allowing optimiza- tions to be applied earlier. A cost-effective solution to this problem is to provide hardware support to speed up the primitives of the software layer, paying special attention to automate DBT/DBO mechanisms and leave the heuristics to the software, which is more flexible. In this work, we have characterized the overheads of a DBO sys- tem using DynamoRIO implementing several basic optimizations. We have seen that the computation of the Data Dependence Graph (DDG) accounts for 5%-10% of the execution time. For this rea- son, we propose to add hardware support for this task in the form of a new functional unit, called DDGacc, which is integrated in a conventional pipeline processor and is operated through new ISA instructions. Our evaluation shows that DDGacc reduces the cost of computing the DDG by 32x, which reduces overall execution time by 5%-10% on average and up to 18% for applications where the DBO optimizes large code footprints. |
dc.format.extent | 10 p. |
dc.language.iso | eng |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures distribuïdes |
dc.subject.lcsh | Processament distribuït de dades |
dc.subject.other | Co-designed processors |
dc.subject.other | Dynamic binary optimization |
dc.subject.other | Hardware acceleration |
dc.subject.other | Start-up overhead |
dc.title | DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware support |
dc.type | Conference report |
dc.subject.lemac | Electronic data processing--Distributed processing |
dc.contributor.group | Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors |
dc.identifier.doi | 10.1145/2151024.2151046 |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | http://dl.acm.org/citation.cfm?doid=2151024.2151046 |
dc.rights.access | Restricted access - confidentiality agreement |
local.identifier.drac | 10254366 |
dc.description.version | Postprint (published version) |
dc.date.lift | 10000-01-01 |
local.citation.author | Pavlou, D.; Gibert, E.; Latorre, F.; Gonzalez, A. |
local.citation.contributor | ACM SIGPLAN/SIGOPS Conference on Virtual Execution Environments |
local.citation.publicationName | VEE'12 - Proceedings of the ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments |
local.citation.startingPage | 159 |
local.citation.endingPage | 168 |