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Setting an error detection infrastructure with low cost acoustics wave detectors
dc.contributor.author | Upasani, Gaurang |
dc.contributor.author | Vera Rivera, Francisco Javier |
dc.contributor.author | González Colás, Antonio María |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
dc.date.accessioned | 2013-03-12T18:17:30Z |
dc.date.created | 2012 |
dc.date.issued | 2012 |
dc.identifier.citation | Upasani, G.; Vera, F.; Gonzalez, A. Setting an error detection infrastructure with low cost acoustics wave detectors. A: International Symposium on Computer Architecture. "ISCA'12: proceedings of the 39th International Symposium on Computer Architecture". Portland, OR: IEEE, 2012, p. 333-343. |
dc.identifier.isbn | 978-1-4503-1642-2 |
dc.identifier.uri | http://hdl.handle.net/2117/18242 |
dc.description.abstract | The continuing decrease in dimensions and operating voltage of transistors has increased their sensitivity against radiation phenomena making soft errors an important challenge in future chip multiprocessors (CMPs). Hence, new techniques for detecting errors in the logic and memories that allow meeting the desired failures-in-time (FIT) budget in CMPs are required. This paper proposes a low-cost dynamic particle strike detection mechanism through acoustic wave detectors. Our results show that our mechanism can protect both the logic and the memory arrays. As a case study, we also show how this technique can be combined with error codes to protect the last-level cache at low cost. |
dc.format.extent | 11 p. |
dc.language.iso | eng |
dc.publisher | IEEE |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject.lcsh | Acoustic surface waves |
dc.title | Setting an error detection infrastructure with low cost acoustics wave detectors |
dc.type | Conference report |
dc.subject.lemac | Arquitectura d'ordinadors |
dc.subject.lemac | Ones sonores |
dc.contributor.group | Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors |
dc.identifier.doi | 10.1109/ISCA.2012.6237029 |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | http://ieeexplore.ieee.org/xpl/articleDetails.jsp?reload=true&arnumber=6237029 |
dc.rights.access | Restricted access - publisher's policy |
local.identifier.drac | 11614006 |
dc.description.version | Postprint (published version) |
dc.date.lift | 10000-01-01 |
local.citation.author | Upasani, G.; Vera, F.; Gonzalez, A. |
local.citation.contributor | International Symposium on Computer Architecture |
local.citation.pubplace | Portland, OR |
local.citation.publicationName | ISCA'12: proceedings of the 39th International Symposium on Computer Architecture |
local.citation.startingPage | 333 |
local.citation.endingPage | 343 |