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The continuing decrease in dimensions and operating voltage of transistors has increased their sensitivity against radiation phenomena making soft errors an important challenge in future chip multiprocessors (CMPs). Hence, new techniques for detecting errors in the logic and memories that allow meeting the desired failures-in-time (FIT) budget in CMPs are required. This paper proposes a low-cost dynamic particle strike detection mechanism through acoustic wave detectors. Our results show that our mechanism can protect both the logic and the memory arrays. As a case study, we also show how this technique can be combined with error codes to protect the last-level cache at low cost.
CitationUpasani, G.; Vera, F.; Gonzalez, A. Setting an error detection infrastructure with low cost acoustics wave detectors. A: International Symposium on Computer Architecture. "ISCA'12: proceedings of the 39th International Symposium on Computer Architecture". Portland, OR: IEEE, 2012, p. 333-343.
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