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Static task mapping for tiled chip multiprocessors with multiple voltage islands
dc.contributor.author | Nikitin, Nikita |
dc.contributor.author | Cortadella, Jordi |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament de Llenguatges i Sistemes Informàtics |
dc.date.accessioned | 2012-08-28T11:27:07Z |
dc.date.created | 2012 |
dc.date.issued | 2012 |
dc.identifier.citation | Nikitin, N.; Cortadella, J. Static task mapping for tiled chip multiprocessors with multiple voltage islands. A: International Conference on Architecture of Computing Systems. "Architecture of Computing Systems – ARCS 2012. 25th International Conference. Munich, Germany, February 28 – March 2, 2012 Proceedings". Springer Verlag, 2012, p. 50-62. |
dc.identifier.isbn | 978-3-642-28293-5 |
dc.identifier.uri | http://hdl.handle.net/2117/16397 |
dc.description.abstract | The complexity of large Chip Multiprocessors (CMP) makes design reuse a practical approach to reduce the manufacturing and design cost of high-performance systems. This paper proposes techniques for static task mapping onto general-purpose CMPs with multiple pre-defined voltage islands for power management. The CMPs are assumed to contain different classes of processing elements with multiple voltage/frequency execution modes to better cover a large range of applications. Task mapping is performed with awareness of both on-chip and off-chip memory traffic, and communication constraints such as the link and memory bandwidth. A novel mapping approach based on Extremal Optimization is proposed for large-scale CMPs. This new combinatorial optimization method has delivered very good results in quality and computational cost when compared to the classical simulated annealing. |
dc.format.extent | 13 p. |
dc.language.iso | eng |
dc.publisher | Springer Verlag |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject.lcsh | Chip multiprocessing |
dc.subject.lcsh | Task mapping |
dc.subject.lcsh | Power management |
dc.subject.lcsh | Extremal optimization |
dc.title | Static task mapping for tiled chip multiprocessors with multiple voltage islands |
dc.type | Conference report |
dc.subject.lemac | Ordinadors -- Consum d'energia |
dc.subject.lemac | Multiprocessadors |
dc.contributor.group | Universitat Politècnica de Catalunya. ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals |
dc.identifier.doi | 10.1007/978-3-642-28293-5_5 |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | http://rd.springer.com/chapter/10.1007/978-3-642-28293-5_5 |
dc.rights.access | Restricted access - publisher's policy |
local.identifier.drac | 10078416 |
dc.description.version | Postprint (published version) |
dc.date.lift | 10000-01-01 |
local.citation.author | Nikitin, N.; Cortadella, J. |
local.citation.contributor | International Conference on Architecture of Computing Systems |
local.citation.publicationName | Architecture of Computing Systems – ARCS 2012. 25th International Conference. Munich, Germany, February 28 – March 2, 2012 Proceedings |
local.citation.startingPage | 50 |
local.citation.endingPage | 62 |