PublisherIEEE Press. Institute of Electrical and Electronics Engineers
Rights accessRestricted access - publisher's policy
Modern generations of CMOS technology nodes
are facing critical causes of hardware reliability failures, which were not significant in the past. Such vulnerabilities make it essential to investigate new robust design strategies at the Nanoscale circuit system level. In this paper we have introduced an adaptive proactive reconfiguration technique that considers the inherent process variability (variability-aware) and BTI aging,
and effectively enlarges the SRAM lifetime.
CitationPouyan, P.; Amat, E.; Rubio, J.A. SRAM lifetime improvement by using adaptive proactive reconfiguration. A: Mixed Design of Integrated Circuits and Systems. "Proceedings of the 19th International Conference". Warsaw: IEEE Press. Institute of Electrical and Electronics Engineers, 2012, p. 115-119.
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