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Semiconductor technology evolution enables the design of ultra-low-cost chips (e.g., below 1 USD) required for new market segments such as environment, urban life and body monitoring, etc. Recently, hybrid-operation (high Vcc, ultra-low Vcc) single-Vcc-domain cache designs have been proposed to tackle the needs of those chips. However, existing data management policies are far from being optimal during high Vcc operation.
This paper presents ADAM, a new and extremely simple Adaptive Data Management mechanism, which is tailored to detect hit distribution and changing application conditions dynamically at ne grain with negligible hardware overhead.
ADAM is proven to save signi cant energy (29% on average) in L1 caches with negligible performance degradation (1.7% on average), thus improving the energy-delay product
(EDP) noticeably across di erent cache con gurations with respect to all existing data management approaches.
CitationMaric, B.; Abella, J.; Valero, M. ADAM : an efficient data management mechanism for hybrid high and ultra-low voltage operation caches. A: ACM Great Lakes Symposium on VLSI. "GLSVLSI - Proceedings of the ACM Great Lakes Symposium on VLSI". 2012, p. 245-250.
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