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Software-defined radio (SDR) permits dynamic switches of the employed radio access technology (RAT), over-the-air (OTA) software updates, software and hardware reuse. This extended flexibility comes at the price of a higher computing complexity and, in particular, the energy consumption at the receiver. The analysis of the computational profile of signal processing algorithms is of great importance in SDR for understanding the implication on the energy consumption. Several signal processing algorithms show a different profile as a function of the signal quality perceived at the receiver antenna. Therefore, power control policies have an implication on the computational performance of SDR receivers. Understanding the behaviour of these algorithms allows trading transmitted power against receiver energy consumption. This paper presents a model for characterizing the computational profile of Turbo and LDPC decoders and demonstrates is applicability in existing power control strategies.
CitationGomez, I.; Marojevic, V.; Gelonch, A. SDR receiver computational model for application in power control. "Analog integrated circuits and signal processing", Desembre 2011, vol. 69, núm. 2-3, p. 153-160.
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