PublisherAssociation for Computing Machinery (ACM)
Rights accessRestricted access - publisher's policy
With the advent of multicore architectures, especially with the heterogeneous ones, both computational and memory top performance are difficult to obtain using traditional programming models. Usually, programmers have to fully reorganize the code and data of their applications in order to maximize resource usage, and work with the low-level
interfaces offered by the vendor-provided SDKs, to obtain high computational and memory performances. In this paper, we present the evaluation of the SARC programming model on the Cell BE architecture, with respect to memory performance. We show how we have annotated the HPL STREAM and RandomAccess applications, and the memory bandwidth obtained. Results indicate that the programming model provides good productivity and competitive performance on this kind of architectures.
CitationFerrer, R. [et al.]. Evaluation of memory performance on the cell BE with the SARC programming model. A: Workshop on Memory Performance: dealing with Applications, Systems and Architecture. "MEDEA'08 proceedings of the 9th Workshop on memory performance: dealing with applications, systems and architecture". Toronto: Association for Computing Machinery (ACM), 2008, p. 77-84.
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