Thread to core assignment in SMT on-chip multiprocessors
Tipus de documentText en actes de congrés
EditorIEEE Computer Society Publications
Condicions d'accésAccés obert
State-of-the-art high-performance processors like the IBM POWER5 and Intel i7 show a trend in industry towards on-chip Multiprocessors (CMP) involving Simultaneous Multithreading (SMT) in each core. In these processors, the way in which applications are assigned to cores plays a key role in the performance of each application and the overall system performance. In this paper we show that the system throughput highly depends on the Thread to Core Assignment (TCA), regardless the SMT Instruction Fetch (IFetch) Policy implemented in the cores. Our results indicate that a good TCA can improve the results of any underlying IFetch Policy, yielding speedups of up to 28%. Given the relevance of TCA, we propose an algorithm to manage it in CMP+SMT processors. The proposed throughput-oriented TCA Algorithm takes into account the workload characteristics and the underlying SMT IFetch Policy. Our results show that the TCA Algorithm obtains thread-to-core assignments 3% close to the optimal assignation for each case, yielding system throughput improvements up to 21%.
CitacióAcosta, C. A. [et al.]. Thread to core assignment in SMT on-chip multiprocessors. A: International Symposium on Computer Architecture and High Performance Computing. "21st International Symposium on Computer Architecture and High Performance Computing". Sao Paulo: IEEE Computer Society Publications, 2009, p. 67-74.
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