Hardware customization for scientific applications has shown a big potential for reducing power consumption and increasing performance. In particular, the automatic generation of ISA extensions for General-Purpose Processors (GPPs) to accelerate domain-specific applications is an active field of research to accelerate. Those domain-specific accelerated processors are mostly evaluated in simulation environments
due to technical and programmability issues while using real hardware. There is no automatic mechanism to test those custom units in a real hardware environment. In this paper we present a toolchain that can automatically identify candidate parts of the code suitable for reconfigurable hardware
acceleration. We validate our toolchain using ClustalW.
CitationGonzález, C. [et al.]. Fast evaluation methodology for automatic custom hardware prototyping. A: Workshop on Architectural Research Prototyping. "4th Workshop on Architectural Research Prototyping". Austin: 2009.
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