This report presents a fast method of evaluating the power consumption of a bus. Given an on-chip bus driver-interconnection-receiver design of N parallel lines,the objective is to develop its energy consumption macro-model. With this model we are be able to evaluate the energy metrics for the bus under a certain traffic and information coding.
CitationMendoza, R.; Pons, M.; Moll, F.; Figueras, J. Energy macro-model for on chip interconnection buses. Technical Report DOCT-07-0001, June 29, 2006. Barcelona: Universitat Politècnica de Catalunya, 2006
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