A polymorphic register file for matrix operations
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10.1109/ICSAMOS.2010.5642059
Inclou dades d'ús des de 2022
Cita com:
hdl:2117/11342
Tipus de documentText en actes de congrés
Data publicació2010
EditorIEEE Computer Society Publications
Condicions d'accésAccés obert
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Reconeixement-NoComercial-SenseObraDerivada 3.0 Espanya
Abstract
Previous vector architectures divided the available register file space in a fixed number of registers of equal sizes and shapes. We propose a register file organization which allows dynamic creation of a variable number of multidimensional registers of arbitrary sizes referred to as a Polymorphic Register File. Our objective is to evaluate the performance benefits of the proposed organization. Simulation results using real applications (Floyd and CG) suggest speedups of up to 3 times compared to the Cell SPU for Floyd and 2 times compared to a one dimensional vectorized version of the sparse matrix vector multiplication. Moreover, in the same experimental context, a large reduction in the number of executed instructions of up to 3000 times for Floyd and 2000 times for sparse matrix vector multiplication is achieved.
CitacióCiobanu, C. [et al.]. A polymorphic register file for matrix operations. A: International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation. "2010 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2010)". Samos: IEEE Computer Society Publications, 2010, p. 241-249.
ISBN978-1-4244-7937-5
Versió de l'editorhttp://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5642059
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