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Mathematical models to evaluate the memory interference in multimicrocomputer systems
| dc.contributor.author | Valero Cortés, Mateo |
| dc.contributor.author | Alegre de Miguel, Ignasi |
| dc.contributor.author | Sanvicente Gargallo, Emilio |
| dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
| dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Enginyeria Telemàtica |
| dc.contributor.other | Facultat d'Informàtica de Barcelona |
| dc.date.accessioned | 2017-11-13T13:17:29Z |
| dc.date.available | 2017-11-13T13:17:29Z |
| dc.date.issued | 1981 |
| dc.identifier.citation | Valero, M., Alegre de Miguel, I., Sanvicente, E. Mathematical models to evaluate the memory interference in multimicrocomputer systems. A: International Symposium on Mini and Microcomputers. "Proceedings Fifteenth International Symposium on Mini and Microcomputers: MIMI'81 : México City, April 13-15 1981". Mexico D.F.: Universidad Nacional Autónoma de México, 1981, p. 21-26. |
| dc.identifier.isbn | 0226-1480 |
| dc.identifier.uri | http://hdl.handle.net/2117/110485 |
| dc.description.abstract | In the last decade we have witnessed great advances in the integrated circuits technology. Those advances make it possible nowadays for the manufacturing, at reasonable prices of MOS technology memories that are faster than the microprocessors. These memories allow, thus several accesses in each microprocessor cycle. Therefore it seems reasonable to use the to reduce the memory interference in multimicroprocessor systems. In this paper we present two mathematical models useful in the approximate evaluation of the memory interference. The results for both model concide. We also compare the with experimental valuesobtained by simulation. |
| dc.format.extent | 6 p. |
| dc.language.iso | eng |
| dc.publisher | Universidad Nacional Autónoma de México |
| dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles |
| dc.subject.lcsh | Parallel processing (Electronic computers) |
| dc.subject.other | Multimicrocomputer systems |
| dc.subject.other | Memory interference |
| dc.subject.other | Multimicroprocessor systems |
| dc.title | Mathematical models to evaluate the memory interference in multimicrocomputer systems |
| dc.type | Conference report |
| dc.subject.lemac | Processament en paral·lel (Ordinadors) |
| dc.contributor.group | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
| dc.contributor.group | Universitat Politècnica de Catalunya. MAPS - Management, Pricing and Services in Next Generation Networks |
| dc.rights.access | Open Access |
| local.identifier.drac | 21602628 |
| dc.description.version | Postprint (published version) |
| local.citation.author | Valero, M.; Alegre de Miguel, I.; Sanvicente, E. |
| local.citation.contributor | International Symposium on Mini and Microcomputers |
| local.citation.pubplace | Mexico D.F. |
| local.citation.publicationName | Proceedings Fifteenth International Symposium on Mini and Microcomputers: MIMI'81 : México City, April 13-15 1981 |
| local.citation.startingPage | 21 |
| local.citation.endingPage | 26 |
