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Archexplorer for automatic design space exploration
| dc.contributor.author | Desmet, V. |
| dc.contributor.author | Girbal, Sylvain |
| dc.contributor.author | Ramírez Bellido, Alejandro |
| dc.contributor.author | Temam, Olivier |
| dc.contributor.author | Vega, Augusto |
| dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
| dc.date.accessioned | 2010-12-27T15:31:14Z |
| dc.date.available | 2010-12-27T15:31:14Z |
| dc.date.created | 2010-09-09 |
| dc.date.issued | 2010-09-09 |
| dc.identifier.citation | Desmet, V. [et al.]. Archexplorer for automatic design space exploration. "IEEE micro", 09 Setembre 2010, vol. 30, núm. 5, p. 5-15. |
| dc.identifier.issn | 0272-1732 |
| dc.identifier.uri | http://hdl.handle.net/2117/10760 |
| dc.description.abstract | Growing architectural complexity and stringent time-to-market constraints suggest the need to move architecture design beyond parametric exploration to structural exploration. ArchExplorer is a Web-based permanent and open design-space exploration framework that lets researchers compare their designs against others. The authors demonstrate their approach by exploring the design space of an on-chip memory subsystem and a multicore processor. |
| dc.format.extent | 11 p. |
| dc.language.iso | eng |
| dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
| dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
| dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Circuits electrònics |
| dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
| dc.subject.lcsh | Electronic circuit design--Data processing |
| dc.subject.lcsh | Computer architecture |
| dc.subject.lcsh | Microprocessors |
| dc.subject.other | Design-space exploration |
| dc.subject.other | Methodology |
| dc.subject.other | Microarchitecture |
| dc.subject.other | Simulation |
| dc.title | Archexplorer for automatic design space exploration |
| dc.type | Article |
| dc.subject.lemac | Disseny de circuits electrònics -- Processament de dades |
| dc.subject.lemac | Arquitectura de computadors |
| dc.subject.lemac | Microprocessadors |
| dc.contributor.group | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
| dc.identifier.doi | 10.1109/MM.2010.76 |
| dc.relation.publisherversion | http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5567089 |
| dc.rights.access | Open Access |
| local.identifier.drac | 4468240 |
| dc.description.version | Postprint (published version) |
| local.citation.author | Desmet, V.; Girbal, S.; Ramirez, A.; TEMAM, O.; Vega, A. |
| local.citation.publicationName | IEEE micro |
| local.citation.volume | 30 |
| local.citation.number | 5 |
| local.citation.startingPage | 5 |
| local.citation.endingPage | 15 |
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