Architectural support for real-time task scheduling in SMT processors
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hdl:2117/106650
Tipus de documentReport de recerca
Data publicació2005
Condicions d'accésAccés obert
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Abstract
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads. This provides a good cost/performance trade-off which renders these architectures suitable for use in embedded systems. However, since threads share many resources, like caches, they also interfere with each other. As a result, execution times of applications become highly unpredictable and highly dependent on the context in which an application is executed. Obviously, this poses problems if an SMT is to be used in a (soft) real time system.
In this paper, we propose two novel hardware mechanisms that can be used to reduce this performance variability. In contrast to previous approaches, our proposed mechanisms do not need any information beyond the information already known by traditional job schedulers. Neither do they require extensive profiling of workloads to determine optimal schedules. Our mechanisms are based on dynamic resource partitioning. The OS level job scheduler needs to be slightly adapted in order to provide the hardware resource allocator some information on how this resource partitioning needs to be done. We show that our mechanisms provide high stability for SMT architectures to be used in real time systems: the real time benchmarks we used meet their deadlines in more than 98% of the cases considered while the other thread in the workload still achieves high throughput.
CitacióCazorla, F., Knijnenburg, P., Sakellariou, R., Fernández, E., Ramírez , A., Valero, M. "Architectural support for real-time task scheduling in SMT processors". 2005.
Forma partUPC-DAC-RR-CAP-2005-17
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