Predictable performance in SMT processors: synergy between the OS and SMTs
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hdl:2117/105885
Tipus de documentArticle
Data publicació2006-07
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Abstract
Current operating systems (OS) perceive the different contexts of simultaneous multithreaded (SMT) processors as multiple independent processing units, although, in reality, threads executed in these units compete for the same hardware resources. Furthermore, hardware resources are assigned to threads implicitly as determined by the SMT instruction fetch (Ifetch) policy, without the control of the OS. Both factors cause a lack of control over how individual threads are executed, which can frustrate the work of the job scheduler. This presents a problem for general purpose systems, where the OS job scheduler cannot enforce priorities, and also for embedded systems, where it would be difficult to guarantee worst-case execution times. In this paper, we propose a novel strategy that enables a two-way interaction between the OS and the SMT processor and allows the OS to run jobs at a certain percentage of their maximum speed, regardless of the workload in which these jobs are executed. In contrast to previous approaches, our approach enables the OS to run time-critical jobs without dedicating all internal resources to them so that non-time-critical jobs can make significant progress as well and without significantly compromising overall throughput. In fact, our mechanism, in addition to fulfilling OS requirements, achieves 90 percent of the throughput of one of the best currently known fetch policies for SMTs.
CitacióCazorla, F., Knijnenburg, P., Sakellariou, R., Fernández, E., Ramírez, A., Valero, M. Predictable performance in SMT processors: synergy between the OS and SMTs. "IEEE transactions on computers", Juliol 2006, vol. 55, núm. 7, p. 785-799.
ISSN0018-9340
Versió de l'editorhttp://ieeexplore.ieee.org/document/1637396/
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