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Variable-Frequency Grid-Sequence Detector Based on a Quasi-Ideal Low-Pass Filter Stage and a Phase-Locked Loop
dc.contributor.author | Robles Sestafe, Eider |
dc.contributor.author | Ceballos Recio, Salvador |
dc.contributor.author | Pou Félix, Josep |
dc.contributor.author | Martin, Jose Luis |
dc.contributor.author | Zaragoza Bertomeu, Jordi |
dc.contributor.author | Ibáñez, P. |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
dc.date.accessioned | 2010-12-13T10:10:32Z |
dc.date.available | 2010-12-13T10:10:32Z |
dc.date.created | 2010-09 |
dc.date.issued | 2010-09 |
dc.identifier.citation | Robles, E. [et al.]. Variable-Frequency Grid-Sequence Detector Based on a Quasi-Ideal Low-Pass Filter Stage and a Phase-Locked Loop. "IEEE transactions on power electronics", Setembre 2010, vol. 25, núm. 10, p. 2552-2563. |
dc.identifier.issn | 0885-8993 |
dc.identifier.uri | http://hdl.handle.net/2117/10551 |
dc.description.abstract | This paper proposes a filtered-sequence phase-locked loop (FSPLL) structure for detection of the positive sequence in three-phase systems. The structure includes the use of the Park transformation and moving average filters (MAF). Performance of the MAF is mathematically analyzed and represented in Bode diagrams. The analysis allows a proper selection of the window width of the optimal filter for its application in the dq transformed variables. The proposed detector structure allows fast detection of the grid voltage positive sequence (within one grid voltage cycle). The MAF eliminates completely any oscillation multiple of the frequency for which it is designed; thus, this algorithm is not affected by the presence of imbalances or harmonics in the electrical grid. Furthermore, the PLL includes a simple-frequency detector that makes frequency adaptive the frequency depending blocks. This guarantees the proper operation of the FSPLL under large frequency changes. The performance of the entire PLL-based detector is verified through simulation and experiment. It shows very |
dc.format.extent | 12 p. |
dc.language.iso | eng |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Electrònica de potència |
dc.subject.lcsh | Frequency discriminators |
dc.subject.lcsh | Electric current converters |
dc.subject.lcsh | Phase-locked loops |
dc.title | Variable-Frequency Grid-Sequence Detector Based on a Quasi-Ideal Low-Pass Filter Stage and a Phase-Locked Loop |
dc.type | Article |
dc.subject.lemac | Convertidors de freqüència |
dc.subject.lemac | Detectors |
dc.contributor.group | Universitat Politècnica de Catalunya. (TIEG) - Terrassa Industrial Electronics Group |
dc.identifier.doi | 10.1109/TPEL.2010.2050492 |
dc.description.peerreviewed | Peer Reviewed |
dc.relation.publisherversion | http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=05466221 |
dc.rights.access | Open Access |
local.identifier.drac | 4414646 |
dc.description.version | Postprint (published version) |
local.citation.author | Robles, E.; Ceballos, S.; Pou, J.; Martin, J.; Zaragoza, J.; Ibáñez, P. |
local.citation.publicationName | IEEE transactions on power electronics |
local.citation.volume | 25 |
local.citation.number | 10 |
local.citation.startingPage | 2552 |
local.citation.endingPage | 2563 |
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