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dc.contributor.authorFernandez, Gabriel
dc.contributor.authorJalle, Javier
dc.contributor.authorAbella Ferrer, Jaume
dc.contributor.authorQuiñones, Eduardo
dc.contributor.authorVardanega, Tullio
dc.contributor.authorCazorla, Francisco J.
dc.contributor.otherBarcelona Supercomputing Center
dc.date.accessioned2017-03-17T16:03:24Z
dc.date.available2017-03-17T16:03:24Z
dc.date.issued2016-10-11
dc.identifier.citationFernandez, G. [et al.]. Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration. "IEEE Transactions on Computers", 11 Octubre 2016, vol. 66, núm. 4, p. 586-600.
dc.identifier.issn0018-9340
dc.identifier.urihttp://hdl.handle.net/2117/102625
dc.description.abstractNumerous researchers have studied the contention that arises among tasks running in parallel on a multicore processor. Most of those studies seek to derive a tight and sound upper-bound for the worst-case delay with which a processor resource may serve an incoming request, when its access is arbitrated using time-predictable policies such as round-robin or FIFO. We call this value upper-bound delay ( ubd ). Deriving trustworthy ubd statically is possible when sufficient public information exists on the timing latency incurred on access to the resource of interest. Unfortunately however, that is rarely granted for commercial-of-the-shelf (COTS) processors. Therefore, the users resort to measurement observations on the target processor and thus compute a “measured” ubdm . However, using ubdm to compute worst-case execution time values for programs running on COTS multicore processors requires qualification on the soundness of the result. In this paper, we present a measurement-based methodology to derive a ubdm under round-robin (RoRo) and first-in-first-out (FIFO) arbitration, which accurately approximates ubd from above, without needing latency information from the hardware provider. Experimental results, obtained on multiple processor configurations, demonstrate the robustness of the proposed methodology.
dc.description.sponsorshipThe research leading to this work has received funding from: the European Union’s Horizon 2020 research and innovation programme under grant agreement No 644080(SAFURE); the European Space Agency under Contract 789.2013 and NPI Contract 40001102880; and COST Action IC1202, Timing Analysis On Code-Level (TACLe). This work has also been partially supported by the Spanish Ministry of Science and Innovation under grant TIN2015-65316-P. Jaume Abella has been partially supported by the MINECO under Ramon y Cajal postdoctoral fellowship number RYC-2013-14717. The authors would like to thanks Paul Caheny for his help with the proofreading of this document.
dc.format.extent15 p.
dc.language.isoeng
dc.publisherInstitute of Electrical and Electronics Engineers (IEEE)
dc.subjectÀrees temàtiques de la UPC::Enginyeria de la telecomunicació
dc.subject.lcshReal-time systems
dc.subject.lcshComputers Programming
dc.subject.lcshComputers--Research
dc.subject.lcshProcessors, High performance
dc.subject.otherComputers and information processing
dc.subject.otherReal-time systems
dc.subject.otherParallel architectures
dc.subject.otherMulticore processing
dc.titleComputing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration
dc.typeArticle
dc.subject.lemacProgramació en temps real
dc.subject.lemacSupercomputadors
dc.subject.lemacProgramació (Ordinadors)
dc.identifier.doi10.1109/TC.2016.2616307
dc.description.peerreviewedPeer Reviewed
dc.relation.publisherversionhttp://ieeexplore.ieee.org/document/7588111/
dc.rights.accessOpen Access
dc.description.versionPostprint (author's final draft)
dc.relation.projectidinfo:eu-repo/grantAgreement/EC/H2020/644080/EU/SAFety and secURity by design for interconnected mixed-critical cyber-physical systems/SAFURE
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO//TIN2015-65316-P/ES/COMPUTACION DE ALTAS PRESTACIONES VII/
dc.relation.projectidinfo:eu-repo/grantAgreement/MINECO//RYC-2013-14717/ES/RYC-2013-14717/
local.citation.publicationNameIEEE Transactions on Computers
local.citation.volume66
local.citation.number4
local.citation.startingPage586
local.citation.endingPage600


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