Efficient resources assignment schemes for clustered multithreaded processors
Tipus de documentText en actes de congrés
EditorInstitute of Electrical and Electronics Engineers (IEEE)
Condicions d'accésAccés obert
New feature sizes provide larger number of transistors per chip that architects could use in order to further exploit instruction level parallelism. However, these technologies bring also new challenges that complicate conventional monolithic processor designs. On the one hand, exploiting instruction level parallelism is leading us to diminishing returns and therefore exploiting other sources of parallelism like thread level parallelism is needed in order to keep raising performance with a reasonable hardware complexity. On the other hand, clustering architectures have been widely studied in order to reduce the inherent complexity of current monolithic processors. This paper studies the synergies and trade-offs between two concepts, clustering and simultaneous multithreading (SMT), in order to understand the reasons why conventional SMT resource assignment schemes are not so effective in clustered processors. These trade-offs are used to propose a novel resource assignment scheme that gets and average speed up of 17.6% versus Icount improving fairness in 24%.
CitacióFernando, L., González, J., González, A. Efficient resources assignment schemes for clustered multithreaded processors. A: IEEE International Symposium on Parallel and Distributed Processing. "IEEE International Symposium on Parallel and Distributed Processing, 2008: IPDPS 2008; 14-18 April 2008, Miami, Florida, USA". Miami, Florida: Institute of Electrical and Electronics Engineers (IEEE), 2008, p. 982-993.
Versió de l'editorhttp://ieeexplore.ieee.org/document/4536226/