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dc.contributorGelado Fernandez, Isaac
dc.contributor.authorClaret Exojo, Albert
dc.contributor.otherUniversitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.date.accessioned2009-10-13T07:23:44Z
dc.date.available2009-10-13T07:23:44Z
dc.date.issued2009-07
dc.identifier.urihttp://hdl.handle.net/2099.1/7589
dc.description.abstractIntel co-founder Gordon E. Moore observed in 1965 that transistor density, the number of transistors that could be placed in an integrated circuit per square inch, increased exponentially, doubling roughly every two years. This would be later known as Moore's Law, correctly predicting the trend that governed computing hardware manufacturing for the late 20th century. For many decades, software developers have enjoyed a steady application performance increase due to continuous hardware improvements as described by Moore's Law, as well as computer architecture improvements. Currently, however, the memory wall, which refers to the increasing speed di erence between the CPU and memory, and the instruction-level parallelism wall (ILP wall ), which refers to the inability to nd more operations in an application which can be performed simultaneously due to data dependency, have been reached. Application performance no longer bene ts from continuous processor frequency increases as it had before. Furthermore, other issues such as wire delays and static and dynamic power density prevent signi cant processor frequency increases
dc.language.isoeng
dc.publisherUniversitat Politècnica de Catalunya
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Spain
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
dc.subjectÀrees temàtiques de la UPC::Informàtica::Infografia
dc.subject.lcshComputer graphics
dc.subject.otherGraphics card
dc.subject.otherAcclerator
dc.titleDesign and Implementation of a PTX Emulation Library
dc.typeMaster thesis (pre-Bologna period)
dc.subject.lemacInfografia
dc.rights.accessOpen Access
dc.audience.educationlevelEstudis de primer/segon cicle
dc.audience.mediatorEscola Tècnica Superior d'Enginyeria de Telecomunicació de Barcelona
dc.audience.degreeENGINYERIA DE TELECOMUNICACIÓ (Pla 1992)


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