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Memory Controller Design for GPU Simulation in Multi2sim
dc.contributor | Canal Corretger, Ramon |
dc.contributor.author | Seyhanli, Özgür |
dc.contributor.other | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
dc.date.accessioned | 2015-05-13T07:00:24Z |
dc.date.available | 2015-05-13T07:00:24Z |
dc.date.issued | 2015-04-28 |
dc.identifier.uri | http://hdl.handle.net/2099.1/25997 |
dc.description.abstract | I implemented memory controller to the GPU simulation of Multi2Sim simulator. The memory controller offers 2 different scheduling options in order to improve the efficiency of the simulator. |
dc.language.iso | eng |
dc.publisher | Universitat Politècnica de Catalunya |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Hardware |
dc.subject.lcsh | Graphical user interfaces (Computer systems) |
dc.subject.other | Multi2Sim |
dc.subject.other | GPGPU |
dc.subject.other | scheduling |
dc.subject.other | simulation |
dc.title | Memory Controller Design for GPU Simulation in Multi2sim |
dc.title.alternative | Memory Controller for GPU |
dc.type | Master thesis |
dc.subject.lemac | Interfícies gràfiques d'usuari (Informàtica) |
dc.identifier.slug | 99590 |
dc.rights.access | Open Access |
dc.date.updated | 2015-04-30T04:00:19Z |
dc.audience.educationlevel | Màster |
dc.audience.mediator | Facultat d'Informàtica de Barcelona |
dc.audience.degree | MÀSTER UNIVERSITARI EN ARQUITECTURA DE COMPUTADORS, XARXES I SISTEMES (Pla 2009) |