Tipus de documentProjecte/Treball Final de Carrera
Condicions d'accésAccés obert
Bit Error Rate Testing(BERT) was implemented using Cyclone III FPGA Starter Kit along with THDB_ADA board and interfaced with several kilometers long optical fiber, to study the link performance of the optical communication system. In this, a single FPGA acts as both transmitter and receiver. The logic to transmit the PRBS bits using LFSR and receive them at the receiver to check for bit errors was implemented.