Design and analysis of a novel multilevel active-clamped power-converter
ColaboratorBordonau Farrerons, Josep; Busquets Monge, Sergio; Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
Document typeDoctoral thesis
PublisherUniversitat Politècnica de Catalunya
Rights accessOpen Access
Multilevel converter technology has been receiving increasing attention during the last years due to its important advantages compared to conventional two-level conversion. Multilevel converters reduce the voltage across each semiconductor. These converters also synthesize waveforms with better harmonic spectrum, and in most cases, increasing the efficiency of the power conversion system. However, a larger quantity of semiconductors is needed and the modulation strategy to control them becomes more complex. There are three basic multilevel converter topologies: diode clamped, flying capacitor, and cascaded H-bridge with separate dc sources. Numerous hybrid configurations combining them and other multilevel topologies have also been presented in the literature. A novel multilevel active-clamped (MAC) topology is the subject of study of the present thesis. This topology is derived from the generalized multilevel topology by simply removing all flying capacitors. The topology can also be seen as an extension into an arbitrary number of levels of the three-level active neutral-point-clamped (ANPC) topology. The novel converter is controlled using a proper set of switching states and a switching state transition strategy, which permits to obtain the maximum benefits from the converter. In this thesis, the performance and operating capabilities of the MAC topology are studied through comprehensive efficiency and fault-tolerance analyses. The efficiency analysis comprises a study of power-device conduction and switching losses in the topology, followed by analytical and experimental efficiency comparisons between the MAC converter and conventional two-level converters. In the analysis of the fault-tolerance capacity of the MAC topology both open- and short-circuit faults are considered and the analysis is carried out under single-device and two-simultaneous-device faults. Switching strategies to overcome the limitations caused by faults and topology variations to increment the fault-tolerance ability of the MAC converter are proposed. The thesis also proposes guidelines to guarantee a proper MAC converter design and improve its performance.
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