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http://hdl.handle.net/2117/8127
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| 3DWave_Transaction_on_Hipeac.pdf | main article | 274.42 kB | Adobe PDF |  |
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| Citació: | Azevedo, A. [et al.]. A highly scalable parallel implementation of H.264. "Transactions on High-Performance Embedded Architectures and Compilers (Transactions on HiPEAC)", 21 Setembre 2009, vol. 4, núm. 2, p. 1-25. |
| Títol: | A highly scalable parallel implementation of H.264 |
| Autor: | Azevedo, Arnaldo; Juurlink, Ben; Meenderinck, Cor; Terechko, Andrei; Hoogerbrugge, Jan; Álvarez Mesa, Mauricio ; Ramírez Bellido, Alejandro ; Valero Cortés, Mateo  |
| Editorial: | Springer Verlag |
| Data: | 21-set-2009 |
| Tipus de document: | Article |
| Resum: | Developing parallel applications that can harness and efficiently use future many-core architectures is the key challenge for scalable computing systems. We contribute to this challenge by presenting a parallel implementation of H.264 that scales to a large number of cores.
The algorithm exploits the fact that independent macroblocks (MBs) can be processed in parallel, but whereas a previous approach exploits only intra-frame MB-level parallelism, our algorithm exploits intra-frame as well as inter-frame MB-level parallelism. It is based on the observation
that inter-frame dependencies have a limited spatial range. The algorithm has been implemented on a many-core architecture consisting of NXP TriMedia TM3270 embedded processors. This required to develop a subscription mechanism, where MBs are subscribed to the kick-off lists associated with the reference MBs. Extensive simulation results show that the implementation scales very well, achieving a speedup of more than 54 on a 64-core processor, in which case the previous approach achieves a speedup of only 23. Potential drawbacks of the 3D-Wave strategy are that the memory requirements increase since there can be many frames in flight, and that the frame latency might increase. Scheduling policies to address these drawbacks are also presented. The results show that these policies combat memory and latency issues with a negligible
effect on the performance scalability. Results analyzing the impact of the memory latency, L1 cache size, and the synchronization and thread management
overhead are also presented. Finally, we present performance requirements for entropy (CABAC) decoding. |
| URI: | http://hdl.handle.net/2117/8127 |
| Versió de l'editor: | http://www.hipeac.net/system/files?file=3DWave_Transaction_on_Hipeac.pdf |
| Apareix a les col·leccions: | Altres. Enviament des de DRAC Departament d'Arquitectura de Computadors. Articles de revista CAP - Grup de Computació d´Altes Prestacions. Articles de revista
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