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HIPICS - High Performance Integrated Circuits and Systems

Ponències/Comunicacions de congressos : [69]

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Vista preliminarDataTítolAutor(s)
2013Defect-oriented non-intrusive RF test using on-chip temperature sensorsAbdallah, L.; Stratigopoulos, H. G.; Mir, S.; Altet Sanahujes, Josep
2013Study on the optimal distribution of redundancy effort in cross-layer reliable architecturesAymerich Capdevila, Nivard; Rubio Sola, Jose Antonio
2013Novel redundant logic design for noisy low voltage scenariosGarcía Leyva, Lancelot; Calomarde Palomino, Antonio; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio
2013Effectiveness of hybrid recovery techniques on parametric failuresGanapathy, Shrikanth; Canal Corretger, Ramon; González Colás, Antonio María; Rubio Sola, Jose Antonio
2013Temperature as observable magnitude in silicon integrated circuits to characterize high frequency analog circuitsMateo Peña, Diego; Altet Sanahujes, Josep; Gómez Salinas, Didac; Aragonès Cervera, Xavier
2013Extending the fundamental error bounds for asymmetric error reliable computationAymerich Capdevila, Nivard; Rubio Sola, Jose Antonio
2013A single event transient hardening circuit design technique based on strengtheningCalomarde Palomino, Antonio; Amat Bertran, Esteve; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio
2013Reliability study on technology trends beyond 20nmAmat Bertran, Esteve; Calomarde Palomino, Antonio; Rubio Sola, Jose Antonio
2013Logic synthesis for manufacturability considering regularity and lithography printabilityMachado, Lucas; Dal Bem, Vinicius; Moll Echeto, Francisco de Borja; Gómez Fernández, Sergio; Ribas, Renato P.; Reis, André Inacio
2012Shape-shifting digital hardware concept: towards a new adaptive computing systemRubio Sola, Jose Antonio; García Almudéver, Carmen; Martin, Javier; Crespo, A.; Rodriguez, Rosa; Nafría Maqueda, Montserrat
2012On line monitoring of RF power amplifiers with embedded temperature sensorsAltet Sanahujes, Josep; Mateo Peña, Diego; Gómez Salinas, Dídac
DCIS2012_JPP.pdf.jpg2012Closed loop controlled ring oscillator: a variation tolerant self-adaptive clock generation architecturePérez Puigdemont, Jordi; Calomarde Palomino, Antonio; Moll Echeto, Francisco de Borja
2012DC temperature measurements for power gain monitoring in RF power amplifiersAltet Sanahujes, Josep; Mateo Peña, Diego; Gómez Salinas, Dídac; Perpiñà, Xavier; Jordà, Xavier
2012A novel variation-tolerant 4T-DRAM cell with enhanced soft-error toleranceGanapathy, Shrikanth; Canal Corretger, Ramon; Alexandrescu, Dan; Costenaro, Enrico; González Colás, Antonio María; Rubio Sola, Jose Antonio
2012A Novel variation-tolerant 4T-DRAM with enhance soft-error toleranceGanapathy, Shrikanth; Canal Corretger, Ramon; Alexandrescu, Dan; Costenaro, Enrico; González Colás, Antonio María; Rubio Sola, Jose Antonio
2012Electro-thermal characterization of a differential temperature sensor and the thermal coupling in a 65nm CMOS ICAltet Sanahujes, Josep; González Jiménez, José Luis; Gómez Salinas, Dídac; Perpiñà, Xavier; Grauby, Stéphane; Dufis, Cédric; Vellvehi, Miquel; Mateo Peña, Diego; Dilhaire, Stephan; Jordà, Xavier
2012Carbon nanotube FET process variability and noise model for radiofrequency investigationsLandauer, Gerhard Martin; González Jiménez, José Luis
EAB_DCIS12.pdf.jpg2012Mitigation strategies of the variability in 3T1D cell memories scaled beyond 22nmAmat Bertran, Esteve; García Almudéver, Carmen; Aymerich, Nivard; Canal Corretger, Ramon; Rubio Sola, Jose Antonio
2012A compact noise model for carbon nanotube FETsLandauer, Gerhard Martin; González Jiménez, José Luis
2012SRAM lifetime improvement by using adaptive proactive reconfigurationPouyan, Peyman; Amat Bertran, Esteve; Rubio Sola, Jose Antonio
2012Variability and reliability analysis of CNFET in the presence of carbon nanotube density fluctuationGarcía Almudéver, Carmen; Rubio Sola, Jose Antonio
2012Testing RF circuits with true non-intrusive built-in sensorsAbdallah, Louay; Stratigopoulos, Haralampos-G.; Mir, Salvador; Altet Sanahujes, Josep
2012Process variability-aware proactive reconfiguration techniques for mitigating aging effects in nano scale SRAM lifetimeRubio Sola, Jose Antonio; Amat Bertran, Esteve; Pouyan, Peyman
erdiap_template.pdf.jpg2011Design guidelines towards compact litho-friendly regular cellsGómez Fernández, Sergio; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Elhoj, Martin; Schlinker, Guilherme; Woolaway, Nigel
2011Fast time-to-market with via-configurable transistor array regular fabric: A delay-locked loop design case studyGonzález Colás, Antonio María; Pons Solé, Marc; Barajas Ojeda, Enrique; Mateo Peña, Diego; López González, Juan Miguel; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier
erdiap2011_FMarranghello.pdf.jpg2011Transistor sizing analysis of regular fabricsMarranghello, Felipe S.; Dal Bem, Vinicius; Reis, André I.; Ribas, Renato P.; Moll Echeto, Francisco de Borja
2011Non-invasive Monitoring of CMOS Power Amplifiers Operating at RF and mmW Frequencies using an On-chip Thermal SensorGonzález Jiménez, José Luis; Martineau, Baudouin; Mateo Peña, Diego; Altet Sanahujes, Josep
2011Monitor strategies for variability reduction considering correlation between power and timing variabilityMauricio Ferré, Juan; Moll Echeto, Francisco de Borja; Altet Sanahujes, Josep
2011Design of complex circuits using the via-configurable transistor array regular layout fabricPons Solé, Marc; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier; González Colás, Antonio María
2011A new probabilistic design methodology of nanoscale digital circuitsGarcía Leyva, Lancelot; Calomarde Palomino, Antonio; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio
2011Analysis of delay mismatching of digital circuits caused by common environmental fluctuationsAndrade Miceli, Dennis Michael; Calomarde Palomino, Antonio; Rubio Sola, Jose Antonio; Cotofana, Sorin
2011A comparative variability analysis for CMOS and CNFET 6T SRAM cellsGarcía Almudéver, Carmen; Rubio Sola, Jose Antonio
2011Adaptive fault-tolerant architecture for unreliable device technologiesAymerich Capdevila, Nivard; Cotofana, Sorin; Rubio Sola, Jose Antonio
2011Carbon nanotube growth process-related variablity in CNFET'sGarcía Almudéver, Carmen; Rubio Sola, Jose Antonio
2011Impedance characterization of transparent and flexible carbon nanotubes thin film networksIqbal, Muhammad Zahir; Eom, J.; Pérez Puigdemont, Jordi; Ferrer Anglada, Núria
2011Manufacturing variability analysis in carbon nanotube technology: a comparison with bulk CMOS in 6T SRAM scenarioGarcía Almudéver, Carmen; Rubio Sola, Jose Antonio
2011Impact of positive bias temperature instability (PBTI)Aymerich Capdevila, Nivard; Ganapathy, Shrikanth; Rubio Sola, Jose Antonio; Canal Corretger, Ramon; González Colás, Antonio María
DCIS2011_Perez_published.pdf.jpg2011Measuring the tolerance of self-adaptive clocks to supply voltage noisePérez Puigdemont, Jordi; Moll Echeto, Francisco de Borja; Cortadella Fortuny, Jordi
VARI2010.pdf.jpg26-mai-2010On evaluating temperature as observable for CMOS technology variabilityAltet Sanahujes, Josep; Gómez Salinas, Dídac; Dufis, Cédric Yvan; González Jiménez, José Luis; Mateo Peña, Diego; Aragonès Cervera, Xavier; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio
RF101053_Published.pdf.jpg23-mai-2010A 75 pJ/bit All-Digital Quadrature Coherent IR-UWB Transceiver in 0.18 um CMOSBarajas Ojeda, Enrique; Gómez Salinas, Dídac; Mateo Peña, Diego; González Jiménez, José Luis
Altet_ICREA_2010_abstract_ Hot Spot.pdf.jpg2010Hot spot detection in integrated circuits laterally accessing to the substratePerpiñà, Xavier; Altet Sanahujes, Josep; Jordà, Xavier; Vellvehi, Miquel
05548845.pdf.jpg2010Turtle Logic: A new probabilistic design methodology of nanoscale digital circuitsGarcía Leyva, Lancelot; Calomarde Palomino, Antonio; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio
05548578.pdf.jpg2010A comprehensive compensation technique for process variations and environmental fluctuations in digital integrated circuitsAndrade Miceli, Dennis Michael; Calomarde Palomino, Antonio; Rubio Sola, Jose Antonio
DCIS2010Proceedings_Davide.pdf.jpg2010Design of injection locked frequency divider in 65nm CMOS technology for mmW applicationsBrandano, Davide; González Jiménez, José Luis
ESSIRC_FS_mmW_benefits_published.pdf.jpg2010A comparison between grounded and floating shield inductors for mmW VCOsGonzález Jiménez, José Luis; Aragonès Cervera, Xavier; Molina Garcia, Marc Manel; Martineau, Baudouin; Belot, Didier
05615551.pdf.jpg2010Behavioural modelling of DLLs for fast simulation and optimisation of jitter and power consumptionBarajas Ojeda, Enrique; Mateo Peña, Diego; González Jiménez, José Luis
2nd_BCN_PhD_Forum_Proceedings_3 p.9-10.pdf.jpg2010Providing an UWB-IR BAN wireless communications network and its application to design a low power transceiver in CMOS technologyBarajas Ojeda, Enrique; Mateo Peña, Diego; González Jiménez, José Luis
Design of reconfigurable RF circuits....pdf.jpg2010Design of reconfigurable RF circuits for self compensationGómez Salinas, Dídac; Mateo Peña, Diego
Variations-aware....pdf.jpg2010Variations-aware circuit designs for microprocessorsPons Solé, Marc; Moll Echeto, Francisco de Borja; Abella Ferrer, Jaume
Turtle logic....pdf.jpg2010Turtle logic: Novel IC digital probabilistic design methodologyGarcía Leyva, Lancelot; Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja; Calomarde Palomino, Antonio
Altet_Therminic2010_High-Power.pdf.jpg2010High-power test device for package thermal assessment and validation of thermal measuremetn tecniquesJordà, Xavier; Perpiñà, Xavier; Vellvehi, Miquel; Madrid, Francesc; Altet Sanahujes, Josep
DCIS2010Proceedings_Quique.pdf.jpg2010DLL's behavioral modeling for power consumption and jitter fast optimizationBarajas Ojeda, Enrique; Mateo Peña, Diego; González Jiménez, José Luis
Altet_therminic_2010_Electro-Thermal.pdf.jpg2010Electro-thermal coupling analysis methodology for RF circuitsGómez Salinas, Dídac; Mateo Peña, Diego; Altet Sanahujes, Josep
VLSISOC2010_CR.pdf.jpg2010VCTA: A Via-Configurable Transistor Array regular fabricPons Solé, Marc; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier; González Colás, Antonio María
2010Design of a wideband class-A power amplifier for wireline communicationDufis, Cédric Yvan; González Jiménez, José Luis
Altet_therminic_2010_Hot Spot.pdf.jpg2010Hot spot detection in integrated circuits laterally accessing to their substrate using a laser beamPerpiñà, Xavier; Altet Sanahujes, Josep; Jordà, Xavier; Vellvehi, Miquel
LithographyAwareRegularCell.pdf.jpg2010Lithography aware regular cell design based on a predictive technology modelGómez Fernández, Sergio; Moll Echeto, Francisco de Borja
Altet_Mateo_Aldrete_2010 IEEE 16th Int On-Line_Thermal Coupling.pdf.jpg2010Thermal coupling in ICs: aplications to the test and characterization of analogue and RF circuitsAltet Sanahujes, Josep; Mateo Peña, Diego; Aldrete Vidrio, Héctor
Paper Marc Midwest.pdf.jpg2010Effect of high frequency substrate noise on LC-VCOsMolina Garcia, Marc Manel; Aragonès Cervera, Xavier; Mateo Peña, Diego; González Jiménez, José Luis
Fault_Tolerance.pdf.jpg2010Fault-tolerant nanoscale architecture based on linear threshold gates with redundancyAymerich Capdevila, Nivard; Rubio Sola, Jose Antonio
VCTA_DFM&Y2007.pdf.jpgoct-2007Via-configurable transistor array: a regular design technique to improve ICs yieldPons Solé, Marc; Moll Echeto, Francisco de Borja; Rubio, Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier; González Colás, Antonio María
S_1A_2.pdf.jpgago-2007Voltage fluctuations in IC power supply distributionAndrade Miceli, Dennis Michael; Martorell Cid, Ferran; Moll Echeto, Francisco de Borja; Rubio, Antonio
dtis07ieee-12-final.pdf.jpgjul-2007Error probability in synchronous digital circuits due to power supply noiseMartorell Cid, Ferran; Pons Solé, Marc; Rubio, Antonio; Moll Echeto, Francisco de Borja
A2L-C2.pdf.jpgjun-2007Power supply noise and logic error probabilityAndrade Miceli, Dennis Michael; Martorell Cid, Ferran; Pons Solé, Marc; Moll Echeto, Francisco de Borja; Rubio, Antonio
2988a399.pdf.jpg2007System-level simulation of a self-powered sensor with piezoelectric energy harvestingMateu, Loreto; Moll Echeto, Francisco de Borja
ErrorProbability.pdf.jpg2007Error probability in synchronous digital circuits due to power supply noiseMartorell Cid, Ferran; Pons, M; Rubio Sola, Jose Antonio; Moll Echeto, Francisco de Borja
6BDD5CACd01.pdf.jpg2005Phase noise degradation of LC-tank VCOs due to substrate noise and package couplingMéndez, M A; Mateo Peña, Diego; Aragonès Cervera, Xavier; González Jiménez, José Luis
RevEnerHarvMicro.pdf.jpg2005Review of energy harvesting techniques and applications for microelectronicsMateu, Loreto; Moll Echeto, Francisco de Borja
BBDB4122d01.pdf.jpg2003Improved current-source sizing for high-speed high-accuracy current steering d/a convertersMiquel, Albiol; González Jiménez, José Luis; Alarcón Cot, Eduardo José

 

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