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HIPICS - High Performance Integrated Circuits and Systems

Articles de revista : [39]

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Vista preliminarDataTítolAutor(s)
25-ago-2014Study of heat sources interacting in integrated circuits by laser mirage effectPerpiñà Gilabet, Xavier; Jordà, Xavier; Vellvehi, Miquel; Altet Sanahujes, Josep
4-jun-2014An accurate and Verilog-A compatible compact model for graphene field-effect transistorsLandauer, Gerhard Martin; González Jiménez, José Luis; Jiménez Jiménez, David
5-mai-2014A shapeshifting evolvable hardware mechanism based on reconfigurable memFETs crossbar architectureMartín Martínez, Javier; García Almudéver, Carmen; Crespo Yepes, Albert; Rodríguez Martínez, Rosana; Nafría Maqueda, Montserrat; Rubio Sola, Jose Antonio
mai-2014Electro-thermal characterization of a differential temperature sensor in a 65 nm CMOS IC: Applications to gain monitoring in RF amplifiersAltet Sanahujes, Josep; González, José Luis; Gómez Salinas, Dídac; Perpiñà Gilabet, Xavier; Claeys, Wilfrid; Grauby, Stéphane; Dufis, Cédric Yvan; Vellvehi, Miquel; Mateo Peña, Diego; Reverter Cubarsí, Ferran; Dilhaire, Stefan; Jordà, Xavier
2-abr-2014Reliability and performance tunable architecture: the partially asynchronous R-Fold modular redundancy (pA-RMR)Aymerich Capdevila, Nivard; Rubio Sola, Jose Antonio
A SET and Noise Fault Tolerant Circuit Design Technique.pdf.jpg1-abr-2014SET and noise fault tolerant circuit design techniques: application to 7 nm FinFETCalomarde Palomino, Antonio; Amat Bertran, Esteve; Moll Echeto, Francisco de Borja; Vigara Campmany, Julio Enrique; Rubio Sola, Jose Antonio
abr-2014Temperature sensors to measure the central frequency and 3 dB bandwidth in mm W power amplifiersAltet Sanahujes, Josep; Mateo Peña, Diego; Gómez Salinas, Dídac; González Jiménez, José Luis; Martineau, B.; Siligaris, Alexandre; Aragonès Cervera, Xavier
1-feb-2014All-digital simple clock synthesis through a glitch-free variable-length ring oscillatorPérez Puigdemont, Jordi; Moll Echeto, Francisco de Borja; Calomarde Palomino, Antonio
1-feb-2014Measurements of process variability in 40-nm regular and nonregular layoutsMauricio Ferré, Juan; Moll Echeto, Francisco de Borja; Gómez Fernández, Sergio
20-nov-2013Impact of finfet and III-V/Ge technology on logic and memory cell behaviorAmat Bertran, Esteve; Calomarde Palomino, Antonio; García Almudéver, Carmen; Aymerich Capdevila, Nivard; Canal Corretger, Ramon; Rubio Sola, Jose Antonio
nov-2013Controlled degradation stochastic resonance in adaptive averaging cell-based architecturesAymerich Capdevila, Nivard; Cotofana, Sorin; Rubio Sola, Jose Antonio
systematic.pdf.jpgset-2013Systematic and random variability analysis of two different 6T-SRAM layout topologiesAmat Bertran, Esteve; Amatlle, E.; Gómez González, Sergio; Aymerich Capdevila, Nivard; García Almudéver, Carmen; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio
15-ago-2013Yield estimation model for lithography hotspot distortionsGómez Fernández, Sergio; Moll Echeto, Francisco de Borja
1-mai-2013Inductor shielding strategies to protect mmW LC-VCOs from high frequency substrate noiseMolina García, Marc; Aragonès Cervera, Xavier; Mateo Peña, Diego; González Jiménez, José Luis
abr-2013Efficiency determination of RF linear power amplifiers by steady-state temperature monitoring using built-in sensorsAltet Sanahujes, Josep; Gómez, Didac; Perpinyà, X.; Mateo Peña, Diego; González, José Luis; Vellvehi, Miquel; Jordà, Xavier
5-feb-2013Spatially and frequency-resolved monitoring of intradie capacitive coupling by heterodyne excitation infrared lock-in thermographyLeón, J.; Perpiñà, Xavier; Altet Sanahujes, Josep; Vallvehi, Miquel; Jordà, Xavier
oct-2012On the use of static temperature measurements as process variation observableGómez, Didac; Altet Sanahujes, Josep; Mateo Peña, Diego
oct-2012A high dynamic-range RF programmable-gain front end for G.hn RF-Coax in 65-nm CMOSTrulls Fortuny, Xavier; Mateo Peña, Diego; Bofill, Adrià
jul-2012Adaptive fault-tolerant architecture for unreliable technologies with heterogeneous variabilityAymerich Capdevila, Nivard; Cotofana, Sorin; Rubio Sola, Jose Antonio
jul-2012Fault-tolerant nanoscale architecture based on linear threshold gates with redundancyAymerich Capdevila, Nivard; Rubio Sola, Jose Antonio
17-mai-2012On the electrical properties of slotted metallic planes in CMOS processes for RF and millimeter-wave applicationsGonzález Jiménez, José Luis; Martineau, Baudouin; Belot, Didier
1-mar-2012Prediction of the impact of substrate coupled switching noise on frequency synthesizersOsorio Tamayo, Juan Felipe; Aragonès Cervera, Xavier
22-des-2011TRAMS Project: variability and reliability of SRAM memories in sub-22nm bulk-CMOS technologiesCanal Corretger, Ramon; Rubio Sola, Jose Antonio; ASenov, Asen; Brown, Andrew; Miranda, Miguel; Zuber, Paul; González Colás, Antonio María; Vera, Xavier
des-2011New redundant logic design concept for high noise and low voltage scenariosGarcía Leyva, Lancelot; Andrade Miceli, Dennis Michael; Gómez Fernández, Sergio; Calomarde Palomino, Antonio; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio
set-2011A 16-kV HBM RF ESD Protection Codesign for a 1-mW CMOS Direct Conversion Receiver Operating in the 2.4-GHz ISM BandGonzález Jiménez, José Luis; Solar, H.; Adin, Iñigo; Mateo Peña, Diego; Berenguer, Roc
jul-2011Design of a 2.5-GHZ QVCO robust against high frequency substrate noiseMolina Garcia, Marc Manel; Gómez Salinas, Dídac; Aragonès Cervera, Xavier; Mateo Peña, Diego; González Jiménez, José Luis
jun-2011Survey of robustness enhancement techniques for wireless systems-on-a-chip and study of temperature as observable for process variationsOnabajo, M.; Gómez Salinas, Dídac; Aldrete Vidrio, Eduardo; Altet Sanahujes, Josep; Mateo Peña, Diego; Silva-Martínez, José
des-2010Lithography aware regular cell design based on a predictive technology modelGómez Fernández, Sergio; Moll Echeto, Francisco de Borja
AldreteVidrioEduardo.pdf.jpg8-jun-2010Strategies for built-in characterization testing and performance monitoring of analog RF circuits with temperature measurementsAldrete Vidrio, Eduardo; Mateo Peña, Diego; Altet Sanahujes, Josep; Amine Salhi, M.; Grauby, Stéphane; Dilhaire, Stefan; Onabajo, M.; Silva-Martínez, José
TMTT_VCO60_published.pdf.jpg25-mar-2010A 56-GHz LC-Tank VCO With 17% tuning range in 65-nm bulk CMOS for wireless HDMIGonzález Jiménez, José Luis; Badets, Franck; Martineau, Baudouin; Belot, Didier
LocationHotSpots.pdf.jpg2010Location of hot spots in integrated circuits by monitoring the substrate thermal-phase lag with the mirage effectPerpiñà, Xavier; Altet Sanahujes, Josep; Jordà, Xavier; Vellvehi, Miquel; Mestres, Narcís
9C56D63Ad01.pdf.jpg18-des-2009Process and temperature compensation for RF low-noise amplifiers and mixersGómez Salinas, Dídac; Sroka, Milosz; González Jiménez, José Luis
mateu&moll.pdf.jpg2005Optimum piezoelectric bending beam structures for energy harvesting using shoe insertsMateu, Loreto; Moll Echeto, Francisco de Borja
8BDBED6Fd01.pdf.jpggen-2004Mismatch and dynamic modeling of current sources in current-steering cmos d/a converters: an extended design procedureAlbiol, Miquel; González Jiménez, José Luis; Alarcón Cot, Eduardo José
6BD9240Bd01.pdf.jpgset-2002Noise generation and coupling mechanisms in deep-submicron IC'sAragonès Cervera, Xavier; González Jiménez, José Luis; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio
set-2002Four different approaches for the measurement of IC surface temperature: Application to thermal testingSaulnier, J.B; Altet Sanahujes, Josep; Dilhaire, Stefan; Volz, S.; Rampnoux, J.M.; Rubio Sola, Jose Antonio; Grauby, S.; Patino, L.; Claeys, W.
jul-1997Shape effects on electromigration in VLSI interconnectsGonzález Jiménez, José Luis; Rubio Sola, Jose Antonio
oct-1995Analysis and modelling of parasitic substrate coupling in CMOS circuitsAragonès Cervera, Xavier; Moll Echeto, Francisco de Borja; Roca Adrover, Miquel; Rubio Sola, Jose Antonio
A4EA767Fd01.pdf.jpgago-1995Tcmos: low noise power supply technique for digital icsGonzález Jiménez, José Luis; Rubio Sola, Jose Antonio

 

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