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ARCO - Microarquitectura i Compiladors

Ponències/Comunicacions de congressos : [53]

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Vista preliminarDataTítolAutor(s)
2014SSFB: a highly-efficient and scalable simulation reduction technique for SRAM yield analysisRana, Manish; Canal Corretger, Ramon
2014INFORMER: an integrated framework for early-stage memory robustness analysisGanapathy, Shrikanth; Canal Corretger, Ramon; Alexandrescu, Dan; Costenaro, Eric; González Colás, Antonio María; Rubio Sola, Jose Antonio
2014DRAM-based coherent caches and how to take advantage of the coherence protocol to reduce the refresh energyJaksic, Zoran; Canal Corretger, Ramon
2014Warm-up simulation methodology for HW/SW co-designed processorsBrankovic, Aleksandar; Stavrou, K.; Gibert Codina, Enric; González Colás, Antonio María
2014Eliminating redundant fragment shader executions on a mobile GPU via hardware memoizationArnau Montañés, José María; Parcerisa Bundó, Joan Manuel; Xekalakis, Polychronis
2013Combining RAM technologies for hard-error recovery in L1 data caches working at very-low power modesLorente, Vicente; Valero, Alejandro; Sahuquillo, Julio; Petit, Salvador; Canal Corretger, Ramon; López, Pedro; Duato, José
TEAPOT.pdf.jpg2013TEAPOT: a toolset for evaluating performance, power and image quality on mobile graphics systemsArnau Montañés, José María; Parcerisa Bundó, Joan Manuel; Xekalakis, Polychronis
2013Effectiveness of hybrid recovery techniques on parametric failuresGanapathy, Shrikanth; Canal Corretger, Ramon; González Colás, Antonio María; Rubio Sola, Jose Antonio
2013An energy-efficient and scalable eDRAM-based register file architecture for GPGPUJing, Naifeng; Shen, Yao; Lu, Yao; Ganapathy, Shrikanth; Mao, Zhigang; Guo, Minyi; Canal Corretger, Ramon; Liang, Xiaoyao
Dynamic.pdf.jpg2013Dynamic selective devectorization for efficient power gatting of SIMD units in a HW/SW co-designed envirommentKumar, Rakesh; Martínez, Alejandro; González Colás, Antonio María
2013Reducing DUE-FIT of caches by exploiting acoustic wave detectors for error recoveryUpasani, Gaurang; Vera, Xavier; González Colás, Antonio María
2013Reducing DUE-FIT of caches by exploiting acoustic wave detectors for error recoveryUpasani, Gaurang; Vera, Xavier; González Colás, Antonio María
2013Parallel frame rendering: trading responsiveness for energy on a mobile GPUArnau Montañés, José María; Parcerisa Bundó, Joan Manuel; Xekalakis, Polychronis
2012Hardware/software mechanisms for protecting an IDS against algorithmic complexity attacksSreekar Shenoy, Govind; Tubella Murgadas, Jordi; González Colás, Antonio María
2012Reducing energy consumption in human-centric wireless sensor networksMeseguer Pallarès, Roc; Molina Clemente, Carlos; Ochoa, Sergio; Santos, Rodrigo
2012A novel variation-tolerant 4T-DRAM cell with enhanced soft-error toleranceGanapathy, Shrikanth; Canal Corretger, Ramon; Alexandrescu, Dan; Costenaro, Enrico; González Colás, Antonio María; Rubio Sola, Jose Antonio
2012Enhancing 3T DRAMs for SRAM replacement under 10nm tri-gate SOI FinFETsJaksic, Zoran; Canal Corretger, Ramon
2012Setting an error detection infrastructure with low cost acoustics wave detectorsUpasani, Gaurang; Vera Rivera, Francisco Javier; González Colás, Antonio María
2012Analysis of CPI variance for dynamic binary translators/optimizers modulesBrankovic, Aleksandar; Stavrou, Kyriakos; Gibert Codina, Enric; González Colás, Antonio María
2012A Novel variation-tolerant 4T-DRAM with enhance soft-error toleranceGanapathy, Shrikanth; Canal Corretger, Ramon; Alexandrescu, Dan; Costenaro, Enrico; González Colás, Antonio María; Rubio Sola, Jose Antonio
2012Improving the performance efficiency of an IDS by exploiting temporal locality in network trafficSreekar Shenoy, Govind; Tubella Murgadas, Jordi; González Colás, Antonio María
2012Improving the resilience of an IDS against performance throttling attacksSreekar Shenoy, Govind; Tubella Murgadas, Jordi; González Colás, Antonio María
EAB_DCIS12.pdf.jpg2012Mitigation strategies of the variability in 3T1D cell memories scaled beyond 22nmAmat Bertran, Esteve; García Almudéver, Carmen; Aymerich, Nivard; Canal Corretger, Ramon; Rubio Sola, Jose Antonio
2011Fast time-to-market with via-configurable transistor array regular fabric: A delay-locked loop design case studyGonzález Colás, Antonio María; Pons Solé, Marc; Barajas Ojeda, Enrique; Mateo Peña, Diego; López González, Juan Miguel; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier
2011A take-home exam to assess professional skillsLópez Álvarez, David; Cruz Díaz, Josep Llorenç; Sánchez Carracedo, Fermín; Fernández Jiménez, Agustín
2011DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware supportPavlou, Demos; Gibert Codina, Enric; Latorre, Fernando; González Colás, Antonio María
From plasma to beefarm.pdf.jpg2011From plasma to beefarm: Design experience of an FPGA-based multicore prototypeSonmez, N.; Arcas, O.; Sayilar, G.; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Hur, Ibrahim; Singh, S.; Valero Cortés, Mateo
2011Global productiveness propagation: A code optimization technique to speculatively prune useless narrow computationsBhagat, Indu; Gibert Codina, Enric; Sanchez, Jesus; González Colás, Antonio María
2011Impact of positive bias temperature instability (PBTI)Aymerich Capdevila, Nivard; Ganapathy, Shrikanth; Rubio Sola, Jose Antonio; Canal Corretger, Ramon; González Colás, Antonio María
2011Fg-STP: fine-grain single thread partitioning on multicoresRanjan, Rakesh; Latorre Salinas, Fernando; Marcuello Pascual, Pedro; González Colás, Antonio María
2011A co-designed HW/SW approach to general purpose program acceleration using a programmable functional unitDeb, Abhishek; Codina Viñas, Josep M.; González Colás, Antonio María
2011Hardware/software-based diagnosis of load-store queues using expandable activity logsCarretero Casado, Javier Sebastián; Vera Rivera, Francisco Javier; Abella Ferrer, Jaume; Ramírez García, Tanausu; Monchiero, Matteo; González Colás, Antonio María
2011Design of complex circuits using the via-configurable transistor array regular layout fabricPons Solé, Marc; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier; González Colás, Antonio María
2010Circuit propagation delay estimation through multivariate regression-based modeling under spatio-temporal variabilityGanapathy, Shrikanth; Canal Corretger, Ramon; González Colás, Antonio María; Rubio Sola, Jose Antonio
2010MODEST: a model for energy estimation under spatio-temporal variabilityGanapathy, Shrikanth; Canal Corretger, Ramon; González Colás, Antonio María; Rubio Sola, Jose Antonio
05695528.pdf.jpg2010A Dynamically Adaptable Hardware Transactional MemoryLupon Navazo, Marc; Magklis, Grigorios; González Colás, Antonio María
2010Power-efficient spilling techniques for chip multiprocessorsHerrero Abellanas, Enric; González, José; Canal Corretger, Ramon
Variations-aware....pdf.jpg2010Variations-aware circuit designs for microprocessorsPons Solé, Marc; Moll Echeto, Francisco de Borja; Abella Ferrer, Jaume
VLSISOC2010_CR.pdf.jpg2010VCTA: A Via-Configurable Transistor Array regular fabricPons Solé, Marc; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier; González Colás, Antonio María
2010The Auction: optimizing banks usage in non-uniform cache architecturesLira Rueda, Javier; Molina Clemente, Carlos; González Colás, Antonio María
2010Elastic cooperative caching: an autonomus dynamically adaptive memory hierarchy for chip multiprocessorsHerrero Abellanas, Enric; González, José; Canal Corretger, Ramon
MT-SBST.pdf.jpg2010MT-SBST: self-test optimization in multithreaded multicore architecturesFoutris, Nikos; Psarakis, M.; Gizopoulos, Dimitris; Apostolakis, A.; Vera, Xavier; González Colás, Antonio María
Ranjan.pdf.jpg16-des-2009P-slice based efficient speculative multithreadingRanjan, Rakesh; Marcuello Pascual, Pedro; Latorre Salinas, Fernando; González Colás, Antonio María
set-2009Performance analysis of non-uniform cache architecture policies for chip-multiprocessors using the Parsec v2.0 Benchmark SuiteLira Rueda, Javier; Molina Clemente, Carlos; González Colás, Antonio María
jun-2009Boosting single-thread performance in multi-core systems through fine-grain multi-threadingMadriles Gimeno, Carles; López Muñoz, Pedro; Codina, Josep Maria; Gibert Codina, Enric; Latorre Salinas, Fernando; Martínez Vicente, Alejandro; Martinez Morais, Raul; González Colás, Antonio María
Online error detection and correction.pdf.jpgjun-2009Online error detection and correction of erratic bits in register filesVera, Xavier; Abella Ferrer, Jaume; Carretero Casado, Javier Sebastián; Chaparro Valero, Pedro Alonso; González Colás, Antonio María
2009An hybrid eDRAM/SRAM macrocell to implement first-level data cachesValero, Alejandro; Sahuquillo, Julio; Petit, Salvador; Lorente, Vicente; Canal Corretger, Ramon; López, Pedro; Duato, José
Monchiero.pdf.jpg2009Using coherence information and decay techniques to optimize L2 cache leakage in CMPsMonchiero, Matteo; Canal Corretger, Ramon; González Colás, Antonio María
2009Low Vccmin fault-tolerant cache with highly predictable performanceAbella Ferrer, Jaume; Carretero Casado, Javier Sebastián; Chaparro Valero, Pedro Alonso; Vera Rivera, Francisco Javier; González Colás, Antonio María
2009Analysis of non-uniform cache architecture policies for chip-multiprocessors using the Parsec Benchmark SuiteLira Rueda, Javier; Molina Clemente, Carlos; González Colás, Antonio María
Cruz.pdf.jpg2008Evaluación de competencias transversales mediante un examen no presencialCruz Díaz, Josep Llorenç; López Álvarez, David; Sánchez Carracedo, Fermín; Fernández Jiménez, Agustín
VCTA_DFM&Y2007.pdf.jpgoct-2007Via-configurable transistor array: a regular design technique to improve ICs yieldPons Solé, Marc; Moll Echeto, Francisco de Borja; Rubio, Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier; González Colás, Antonio María
Jones.pdf.jpg2005Software directed issue queue power reductionJones, Timothy M.; O’Boyle, Michael F.P.; Abella Ferrer, Jaume; González Colás, Antonio María

 

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