Multilevel DCI-NPC power amplifier high-frequency distortion analysis through parasitic inductance dynamic model

Abstract

The high frequency distortions sources in DCI-NPC (Diode Clamped Inverter-Neutral Point Converter) amplifiers topology are studied and analyzed. It is justified the need of designing a model which contains the different parasitic inductive circuits that presents dynamically this kind of amplifier, as a function of the combination of its active transistors. By means of a proposed pattern layout it is presented a dynamic model of the parasitic inductances of the amplifier Full-Bridge DCI-NPC, and this is used to propose some simple rules for the optimal designing of layouts for this type of amplifiers. Simulation and experimental results are presented to justify the proposed model and the affirmations and recommendations given in this paper.