Discrete fault-clearing instant influence on the simulation of voltage-source-inverter-fed adjustable-speed drives subjected to voltage sags

Abstract

This study analyses the influence of modelling sags with discrete fault-clearing instants on the behaviour of adjustablespeed drives (ASDs) subjected to sags caused by faults. The effects are compared with those of sags modelled with simultaneous fault clearance in all faulted phases (i.e. abrupt fault clearance; the most common approach to voltage sag modelling). In many cases, abrupt fault clearance is far more severe than discrete fault clearance. Thus, if an ASD rides through a more severe case of an abrupt fault clearance test, it will likely ride through a discrete fault clearance sag. As current protocols for testing the immunity of ASDs to voltage sags only consider abrupt fault clearance, it is not necessary to consider the more complicated discrete fault clearance in equipment sag-testing methodology if more severe abrupt clearance sags are properly chosen and tested.