http://hdl.handle.net/2117/598 2013-06-19T02:20:13Z http://hdl.handle.net/2117/19463 Title: A high dynamic-range RF programmable-gain front end for G.hn RF-Coax in 65-nm CMOS Authors: Trulls Fortuny, Xavier; Mateo Peña, Diego; Bofill, Adrià Abstract: A high-dynamic-range programmable-gain inductorless RF front end suitable for the RF-coax bandplan of the G.hn recommendation is presented. A double-input RF programmable gain amplifier (DI-RFPGA) with switchable capacitive attenuation providing four gain settings is used at the input, followed by a current reuse transconductance amplifier (CR-TCA) and a switching stage for frequency downconversion. Besides the gain configurability provided by the DI-RFPGA, the front end adds an additional configuration mechanism by allowing the bypass of the CR-TCA, connecting the DI-RFPGA directly to the switching stage, and thereby providing a total of eight gain settings. The different sets of specifications result in a signal-to-noise-plus-distortion ratio larger than 37 dB for an input power range from 78 to 5 dBm with a bandwidth from 300 MHz to 2.5 GHz. The chip is fabricated in a 65-nm CMOS technology and consumes between 31.8–46.8 mW. The RF front end achieves a voltage gain range of 39.2 dB, with a maximum voltage gain of 25.2 dB, a minimum noise figure of 5.5 dB, and a maximum third-order intermodulation intercept point of 24.2 dBm. The circuit occupies a total area of 0.119 mm. 2013-05-30T14:20:55Z http://hdl.handle.net/2117/19217 Title: Inductor shielding strategies to protect mmW LC-VCOs from high frequency substrate noise Authors: Molina García, Marc; Aragonès Cervera, Xavier; Mateo Peña, Diego; González Jiménez, José Luis Abstract: This paper analyzes the impact of high-frequency substrate noise on two 60 GHz LC-VCOs that implement different strategies for inductor shielding, namely floating and grounded shields. An analytical model, which has previously shown very good accuracy up to 7 GHz, is used to identify the circuit parameters that determine the level of the spurs created by the noise. These parameters are individually evaluated for the two VCOs, identifying their relative responsibility for the observed noise effects. The analysis concludes that a floating inductor shield provides extra immunity compared to a grounded inductor shield, and that this advantage is essentially due to the improvement in the tank quality factor. The predictions of the analytical model are validated by comparing them with circuit simulations and measurements of the noise impact on the two VCOs manufactured in a 65 nm CMOS technology, proving its usefulness at mm-wave frequencies. 2013-05-14T17:11:01Z http://hdl.handle.net/2117/18806 Title: Spatially and frequency-resolved monitoring of intradie capacitive coupling by heterodyne excitation infrared lock-in thermography Authors: León, J.; Perpiñà, Xavier; Altet Sanahujes, Josep; Vallvehi, Miquel; Jordà, Xavier Abstract: This paper combines the infrared lock-in thermography (IR-LIT) and heterodyne excitation techniques to detect high-frequency capacitive currents due to intradie electrical coupling between microelectronic devices or more complex systems. Modulating the excitation with the heterodyne approach, we drive devices or complex systems with high frequency electrical signals in such a way that they behave as low frequency heat sources, modulating their temperature field at a frequency detectable by an IR-LIT system. This approach is analytically studied and extended to a bi-dimensional scenario, showing that the thermal information at low frequency depends on the electrical characteristics of the sample at high frequency. 2013-04-15T16:09:58Z http://hdl.handle.net/2117/18510 Title: Electro-thermal characterization of a differential temperature sensor and the thermal coupling in a 65nm CMOS IC Authors: Altet Sanahujes, Josep; González Jiménez, José Luis; Gómez Salinas, Dídac; Perpiñà, Xavier; Grauby, Stéphane; Dufis, Cédric; Vellvehi, Miquel; Mateo Peña, Diego; Dilhaire, Stephan; Jordà, Xavier Abstract: This paper explains the design decisions and the different measurements we have done in order to characterize the thermal coupling and the ch aracteristics of temperature sensors embedded in a integrated circuit implemented in a CMOS 65nm technology. The circu it contains a 2GHz linear power amplifier, MOS transistors behaving as heat sources and two differential temperatu re sensors. Temperature measurements performed with the embedded sensor are corroborated with an Infra-Red camera and a laser interferometer used as thermometer. 2013-04-02T09:20:34Z http://hdl.handle.net/2117/18455 Title: A Novel variation-tolerant 4T-DRAM with enhance soft-error tolerance Authors: Ganapathy, Shrikanth; Canal Corretger, Ramon; Alexandrescu, Dan; Costenaro, Enrico; González Colás, Antonio María; Rubio Sola, Jose Antonio Abstract: In view of device scaling issues, embedded DRAM (eDRAM) technology is being considered as a strong alternative to conventional SRAM for use in on-chip memories. Memory cells designed using eDRAM technology in addition to being logic-compatible, are variation tolerant and immune to noise present at low supply voltages. However, two major causes of concern are the data retention capability which is worsened by parameter variations leading to frequent data refreshes (resulting in large dynamic power overhead) and the transient reduction of stored charge increasing soft-error (SE) susceptibility. In this paper, we present a novel variation-tolerant 4T-DRAM cell whose power consumption is 20.4% lower when compared to a similar sized eDRAM cell. The retention time on-average is improved by 2.04X while incurring a delay overhead of 3% on the read-access time. Most importantly, using a soft-error (SE) rate analysis tool, we have confirmed that the cell sensitivity to SEs is reduced by 56% on-average in a natural working environment. 2013-03-21T13:41:03Z http://hdl.handle.net/2117/18176 Title: A novel variation-tolerant 4T-DRAM cell with enhanced soft-error tolerance Authors: Ganapathy, Shrikanth; Canal Corretger, Ramon; Alexandrescu, Dan; Costenaro, Enrico; González Colás, Antonio María; Rubio Sola, Jose Antonio Abstract: In view of device scaling issues, embedded DRAM (eDRAM) technology is being considered as a strong alternative to conventional SRAM for use in on-chip memories. Memory cells designed using eDRAM technology in addition to being logic-compatible, are variation tolerant and immune to noise present at low supply voltages. However, two major causes of concern are the data retention capability which is worsened by parameter variations leading to frequent data refreshes (resulting in large dynamic power overhead) and the transient reduction of stored charge increasing soft-error (SE) susceptibility. In this paper, we present a novel variation-tolerant 4T-DRAM cell whose power consumption is 20.4% lower when compared to a similar sized eDRAM cell. The retention time on-average is improved by 2.04X while incurring a delay overhead of 3% on the read-access time. Most importantly, using a soft-error (SE) rate analysis tool, we have confirmed that the cell sensitivity to SEs is reduced by 56% on-average in a natural working environment 2013-03-11T14:33:59Z http://hdl.handle.net/2117/17832 Title: DC temperature measurements for power gain monitoring in RF power amplifiers Authors: Altet Sanahujes, Josep; Mateo Peña, Diego; Gómez Salinas, Dídac; Perpiñà, Xavier; Jordà, Xavier Abstract: In this paper we demonstrate that the steady state temperature increase due to the power dissipated by the circuit under test can be used as observable to test the gain of a 2GHz linear class A Power Amplifier. As a proof of concept, we use two strategies to monitor the temperature: a temperature sensor embedded within the same silicon die, which can be used for a BIST approach, and an Infra Red camera, with applications to failure analysis and product debugging. 2013-02-18T13:32:14Z http://hdl.handle.net/2117/17803 Title: Closed loop controlled ring oscillator: a variation tolerant self-adaptive clock generation architecture Authors: Pérez Puigdemont, Jordi; Calomarde Palomino, Antonio; Moll Echeto, Francisco de Borja 2013-02-15T17:05:50Z http://hdl.handle.net/2117/16657 Title: On line monitoring of RF power amplifiers with embedded temperature sensors Authors: Altet Sanahujes, Josep; Mateo Peña, Diego; Gómez Salinas, Dídac Abstract: In the present paper we analyze that DC temperature measurements of the silicon surface can be used to monitor the high frequency status and performances of class A RF Power Amplifiers. As a proof of concept, we present experimental results obtained with a 65 nm CMOS IC that contains a 2GHz linear class A Power Amplifier and a very simple differential temperature sensor. Results show that the PA output power can be tracked from DC temperature measurements. 2012-10-05T10:54:17Z http://hdl.handle.net/2117/16583 Title: Shape-shifting digital hardware concept: towards a new adaptive computing system Authors: Rubio Sola, Jose Antonio; García Almudéver, Carmen; Martin, Javier; Crespo, A.; Rodriguez, Rosa; Nafría Maqueda, Montserrat Abstract: In this paper a new approach to implement adaptive hardware (AH) based on memFETs crossbar structure is presented. We report a novel computing hardware principle called Shape-Shifting Digital Hardware (SSDH) oriented to execute task requirements in a dynamic, flexible, efficient and adaptive way. In this technique not only the logic functions are modifiable (as in the case of Field Programmable Gate Array, FPGA) but also the physical position of the logic elements that form the circuit. Furthermore, a new technologic strategy that allows implementing large crossbars of memFETs is introduced. The memFET is an electrically reconfigurable field effect and resistive switching device that can be used to perform logic functions and memory blocks. Into an appropriate structure such as a crossbar array, memFET allows the dynamic logic reconfiguration of the crossbar and simplify both the design and the implementation of computing hardware. 2012-09-26T11:26:58Z http://hdl.handle.net/2117/16582 Title: Process variability-aware proactive reconfiguration techniques for mitigating aging effects in nano scale SRAM lifetime Authors: Rubio Sola, Jose Antonio; Amat Bertran, Esteve; Pouyan, Peyman Abstract: Process variations and device aging have a significant impact on the reliability and performance of nano scale integrated circuits. Proactive reconfiguration is an emerging technique to extend the lifetime of embedded SRAM memories. This work introduces a novel version that modifies and enhances the advantages of this method by considering the process variability impact on the memory components. Our results show between 30% and 45% SRAM lifetime increases over the existing proactive reconfiguration technique and between 1.7X and ~10X improvement over the non-proactive reconfiguration. 2012-09-26T10:59:55Z http://hdl.handle.net/2117/16309 Title: Testing RF circuits with true non-intrusive built-in sensors Authors: Abdallah, Louay; Stratigopoulos, Haralampos-G.; Mir, Salvador; Altet Sanahujes, Josep Abstract: We present a set of sensors that enable a builtin test in RF circuits. The key characteristic of these sensors is that they are non-intrusive, that is, they are not electrically connected to the RF circuit, and, thereby, they do not degrade its performances. In particular, the presence of spot defects is detected by a temperature sensor, whereas the performances of the RF circuit in the presence of process variations are implicitly predicted by process sensors, namely dummy circuits and process control monitors. We discuss the principle of operation of these sensors, their design, as well as the test strategy that we have implemented. The idea is demonstrated on an RF low noise amplifier using post-layout simulations. 2012-07-20T16:15:33Z http://hdl.handle.net/2117/16298 Title: Variability and reliability analysis of CNFET in the presence of carbon nanotube density fluctuation Authors: García Almudéver, Carmen; Rubio Sola, Jose Antonio Abstract: Current carbon nanotube (CNT) synthesis processes are not perfect. One of the most critical issue is the presence of density variations in CNT growth. These variations are due to the lack of precise control of CNT location during the synthesis and the presence of metallic CNTs (m-CNTs). In this work we analyze the impact of CNT density fluctuations on carbon nanotube field effect transistor (CNFET) performance. A CNFET reliability analysis is also presented because of CNT density variations can cause a complete failure of CNFET. 2012-07-18T17:44:40Z http://hdl.handle.net/2117/16297 Title: SRAM lifetime improvement by using adaptive proactive reconfiguration Authors: Pouyan, Peyman; Amat Bertran, Esteve; Rubio Sola, Jose Antonio Abstract: Modern generations of CMOS technology nodes are facing critical causes of hardware reliability failures, which were not significant in the past. Such vulnerabilities make it essential to investigate new robust design strategies at the Nanoscale circuit system level. In this paper we have introduced an adaptive proactive reconfiguration technique that considers the inherent process variability (variability-aware) and BTI aging, and effectively enlarges the SRAM lifetime. 2012-07-18T17:40:11Z http://hdl.handle.net/2117/16283 Title: TRAMS Project: variability and reliability of SRAM memories in sub-22nm bulk-CMOS technologies Authors: Canal Corretger, Ramon; Rubio Sola, Jose Antonio; ASenov, Asen; Brown, Andrew; Miranda, Miguel; Zuber, Paul; González Colás, Antonio María; Vera, Xavier Abstract: The TRAMS (Terascale Reliable Adaptive MEMORY Systems) project addresses in an evolutionary way the ultimate CMOS scaling technologies and paves the way for revolutionary, most promising beyond-CMOS technologies. In this abstract we show the significant variability levels of future 18 and 13 nm device bulk-CMOS technologies as well as its dramatic effect on the yield of memory cells and circuits. 2012-07-17T17:48:46Z