http://hdl.handle.net/2117/3645 2013-06-18T04:59:34Z http://hdl.handle.net/2117/17195 Title: IR-drop in on-chip power distribution networks of ICs with nonuniform power consumption Authors: Rius Vázquez, José Abstract: A compact IR-drop model for on-chip power distribution networks in array and wire-bonded ICs is analyzed. Chip dimensions, size, and location of the supply pads, metal coverage, piecewise distribution of IC consumption, and the resistance between the pads and the power supply are considered to obtain closed-form expressions for the IR-drop. The IR-drop model is validated by comparing its results with electrical simulations. The obtained error is in the range of 1%. 2013-01-07T11:20:43Z http://hdl.handle.net/2117/16824 Title: Optimization of oxygen transfer through venturi-based systems applied to the biological sweetening of biogas Authors: Rodriguez, Ginesta; Dorado Castaño, Antonio David; Bonsfills Pedrós, Anna; Sanahuja Moliner, Ricard; Gabriel, David; Gamisans Noguera, Javier 2012-10-31T11:49:52Z http://hdl.handle.net/2117/15090 Title: Lecturer and student perceptions on CLIL at a spanish university Authors: Aguilar Pérez, Marta; Rodríguez Montañés, Rosa Abstract: This study reports on a pilot implementation of Content and Language Integrated Learning (CLIL) at a Spanish university. In order to find out how both lecturers and students perceived their experience, several interviews and meetings took place with lecturers, and an open-ended questionnaire was passed to students. The meetings and interviews with lecturers yielded important information about their satisfaction. It was found out that lecturers were mostly interested in practising and improving their English spoken fluency, they did not feel that the quality of their teaching had been sacrificed, they had not included any question on language learning in their assessment and they showed great reluctance to receiving any CLIL methodological training. As to students’ reactions, analysis of their questionnaires revealed that most of them found the experience positive. Their self-reported perceived gains unanimously point to the specialised vocabulary they have learnt and, in the second place, to an improvement of their listening and speaking skills. The most outstanding negative aspect they found is lecturers’ insufficient level of English. CLIL training specially adapted to university teachers is necessary so that lecturers can overcome their reluctance to a methodological training and thereby the potential of CLIL is realised. 2012-02-13T12:04:55Z http://hdl.handle.net/2117/12696 Title: Gate leakage impact on full open defects in interconnect lines Authors: Arumi Delgado, Daniel; Rodríguez Montañés, Rosa; Figueras Pàmies, Joan; Eichenberger, Stefan; Hora, Camelia; Kruseman, Bram Abstract: An Interconnect full open defect breaks the connection between the driver and the gate terminals of downstream transistors, generating a floating line. The behavior of floating lines is known to depend on several factors, namely parasitic capacitances to neighboring structures, transistor capacitances of downstream gate(s) and trapped charges. For nanometer CMOS technologies, the reduction of oxide thickness leads to a significant increase in gate tunneling leakage. This new phenomenon influences the behavior of circuits with interconnect full open defects. Floating lines can no longer be considered electrically isolated and are subjected to transient evolutions, reaching a steady state determined by the technology, downstream interconnect and gate(s) topology. The occurrence of such defects and the impact of gate tunneling leakage are expected to increase in the future. In this work, interconnect full open defects affecting nanometer CMOS technologies are analyzed and the defective logic response of downstream gates after reaching the steady state is predicted. Experimental evidence of this behavior is presented for circuits belonging to a 180 nm and a 65 nm CMOS technologies. Technology trends show that the impact of gate leakage currents is expected to increase in future technologies. 2011-06-02T13:57:25Z http://hdl.handle.net/2117/7805 Title: Built-In Sensor for Signal Integrity Faults in Digital Interconnect Signals Authors: Champac Vilela, Víctor Hugo; Avendaño, Victor; Figueras Pàmies, Joan Abstract: Testing of signal integrity (SI) in current high-speed ICs, requires automatic test equipment test resources at the multigigahertz range, normally not available. Furthermore, for most internal nets of state-of-the-art ICs, external speed testing is not possible for the newest technologies. In this paper, on-chip testing for SI faults in digital interconnect signals, using built-in high speed monitors, is proposed. A coherent sampling scheme is used to capture the signal information. Two monitors to test SI violations are proposed: one for undershoots at the high logic level and the other for overshoots at the low logic level. The monitors are capable of detecting small noise pulses and have been extended to test sequentially more than one signal. The cost of the proposed strategy is analyzed in terms of area, delay penalization, and test time. The effects of clock jitter and process variations are analyzed. Experimental results obtained in designed and fabricated circuits show the feasibility of the proposed testing strategy. A good agreement appears between the theoretical analysis, simulation results, and the experimental measurements. 2010-06-22T17:00:05Z http://hdl.handle.net/2117/7803 Title: Localization and Electrical Characterization of Interconnect Open Defects Authors: Rodríguez Montañés, Rosa; Arumi Delgado, Daniel; Figueras Pàmies, Joan; Beverloo, Willem; Vries, Dirk K. de; Eichenberger, Stefan; Volf, Paul A. J. Abstract: A technique for extracting the electrical and topological parameters of open defects in process monitor lines is presented. The procedure is based on frequency-domain measurements performed at both end points of the line. The location as well as the resistive value of the open defect are derived from attenuation and phase shift measurements. The characteristic defect-free impedance of the line and its propagation constant are considered to be unknowns, and their values are also derived from the above measurements. In this way, the impact of process parameter variations on the proposed model is diminished. The experimental setup required to perform the characterization measurements and a simple graphical procedure to determine the defect and line parameters are presented. Experimental results show a good agreement between the predicted location of the open and its real location, found by optical beam induced resistance change inspection. Errors smaller than 2% of the total length of the line have been observed in the experiments. 2010-06-22T16:46:52Z