• Measurement-based probabilistic timing analysis for multi-path programs 

      Cucu Grosjean, Liliana; Santinelli, Luca; Houston, Michael; Lo, Code; Vardanega, Tulio; Kosmidis, Leonidas; Abella Ferrer, Jaume; Mezzetti, Enrico; Quiñones, Eduardo; Cazorla Almeida, Francisco Javier (2012)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      The rigorous application of static timing analysis requires a large and costly amount of detail knowledge on the hardware and software components of the system. Probabilistic Timing Analysis has potential for reducing the ...
    • Modeling contention interference in crossbar-based systems via sequence-aware pairing (SeAP) 

      Giesen León, Jeremy Jens (Universitat Politècnica de Catalunya, 2020-06-23)
      Projecte Final de Màster Oficial
      Accés obert
      Critical Real-time Embedded Systems encompasses an increasingly relevant class of embedded systems for which the timely execution of a functionality is as important as its functional correctness. The derivation of trustworthy ...
    • MUCH: exploiting pairwise hardware event monitor correlations for improved timing analysis of complex MPSoCs 

      Vilardell Moreno, Sergi; Serra Mochales, Isabel; Mezzetti, Enrico; Abella Ferrer, Jaume; Cazorla Almeida, Francisco Javier (Association for Computing Machinery (ACM), 2021)
      Text en actes de congrés
      Accés obert
      Measurement-based timing analysis techniques increasingly rely on the Performance Monitoring Units (PMU) of MPSoCs, as these units implement specialized Hardware Event Monitors (HEMs) that convey detailed information about ...
    • On the tailoring of CAST-32A certification guidance to real COTS multicore architectures 

      Agirre, Irune; Abella Ferrer, Jaume; Azkarate-Askasua, Mikel; Cazorla, Francisco J. (IEEE, 2018-03-12)
      Comunicació de congrés
      Accés obert
      The use of Commercial Off-The-Shelf (COTS) multicores in real-time industry is on the rise due to multicores' potential performance increase and energy reduction. Yet, the unpredictable impact on timing of contention in ...
    • Ring oscillator clocks and margins 

      Cortadella, Jordi; Lupon Navazo, Marc; Moreno Vega, Alberto; Roca Pérez, Antoni; Sapatnekar, Sachin (Institute of Electrical and Electronics Engineers (IEEE), 2016)
      Text en actes de congrés
      Accés obert
      How much margin do we have to add to the delay lines of a bundled-data circuit? This paper is an attempt to give a methodical answer to this question, taking into account all sources of variability and the existing EDA ...
    • Using randomized caches in probabilistic real-time systems 

      Quiñones, Eduardo; Berger, Emery D.; Bernat, Guillem; Cazorla Almeida, Francisco Javier (2009)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      While hardware caches are generally effective at improving application performance, they greatly complicate performance prediction. Slight changes in memory layout or data access patterns can lead to large and ...