Ara es mostren els items 1-12 de 12

    • A structural encoding technique for the synthesis of asynchronous circuits 

      Carmona Vargas, Josep; Cortadella, Jordi; Pastor Llorens, Enric (Institute of Electrical and Electronics Engineers (IEEE), 2001)
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      This paper presents a method for the automatic synthesis of asynchronous circuits from Petri net specifications. The method is based on a structural encoding of the system in such a way that a circuit implementation is ...
    • An optimal tracking power sharing controller for inverter-based generators in grid-connected mode 

      Patarroyo Montenegro, Juan; Castellà Rodil, Marc; Andrade Rengifo, Fabio; Kampouropoulos, Konstantinos; Romeral Martínez, José Luis; Vasquez-Plaza, Jesus D. (2019)
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      Accés restringit per política de l'editorial
      In this work, an optimal power sharing controller for a three-phase Inverter-based Generator (IG) in a synchronous d-q reference frame is presented. The optimization of this controller is computed using a Linear-Quadratic ...
    • Combining structural and symbolic methods for the verification of concurrent systems 

      Cortadella, Jordi (Institute of Electrical and Electronics Engineers (IEEE), 1998)
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      The contributions during the last few years on the structural theory of Petri nets can now be applied to formal verification. The structural theory provides methods to find efficient encoding schemes for symbolic representations ...
    • Disturbance attenuation of DC voltage droop control structures in a multi-terminal HVDC grid 

      Thams, Florian; Prieto Araujo, Eduardo; Chatzivasileiadis, Spyron; Eriksson, Robert; Gomis Bellmunt, Oriol (Institute of Electrical and Electronics Engineers (IEEE), 2017)
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      DC voltage droop control is seen as the preferred control structure for primary voltage control of future multi-terminal HVDC systems. Different droop control structures have been proposed in literature which can be ...
    • Efficient exploration of availability models guided by failure distances 

      Carrasco, Juan A.; Calderón, A; Escribá, J (1996-05)
      Article
      Accés obert
      Recently, a method to bound the steady-state availability using the failure distance concept has been proposed. In this paper we refine that method by introducing state space exploration techniques. In the methods proposed ...
    • Formal verification of safety properties in timed circuits 

      Peña Basurto, Marco Antonio; Cortadella, Jordi; Kondratyev, Alex; Pastor Llorens, Enric (Institute of Electrical and Electronics Engineers (IEEE), 2000)
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      The incorporation of timing makes circuit verification computationally expensive. This paper proposes a new approach for the verification of timed circuits. Rather than calculating the exact timed stare space, a conservative ...
    • Generalized Discontinuous Conduction Modes in the Complementarity Formalism 

      Batlle Arnau, Carles; Fossas Colet, Enric; Merillas Santos, Iván; Miralles de la Asunción, Alicia (IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2005-08)
      Article
      Accés obert
      We model dc–dc power converters using the complementarity formalism. For each position of the switches, the dynamics is given by a linear complementarity system which incorporates, in a natural way, the description of ...
    • Identifying state coding conflicts in asynchronous system specifications using Petri net unfoldings 

      Kondratyev, Alex; Cortadella, Jordi; Kishinevsky, Michael; Lavagno, Luciano; Taubin, Alexander; Yakovlev, Alex (Institute of Electrical and Electronics Engineers (IEEE), 1998)
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      State coding conflict detection is a fundamental part of synthesis of asynchronous concurrent systems from their specifications as signal transition graphs (STGs), which are a special kind of labelled Petri nets. The paper ...
    • Impact of the DC cable models on the SVD analysis of a multi-terminal HVDC system 

      Akkari, Samy; Prieto-Araujo, E.; Jing, Dai; Gomis Bellmunt, Oriol; Guillaud, Xavier (Institute of Electrical and Electronics Engineers (IEEE), 2016)
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      High Voltage Direct Current (HVDC) grids are complex Multi-Inputs Multi-Outputs (MIMO) systems whose dynamics are difficult to assess. This paper first describes the modelling of VSC-based Multi-Terminal HVDC systems (MTDC) ...
    • Partial order based approach to synthesis of speed-independent circuits 

      Semenov, Alex; Yakovlev, Alex; Pastor Llorens, Enric; Peña Basurto, Marco Antonio; Cortadella, Jordi; Lavagno, Luciano (Institute of Electrical and Electronics Engineers (IEEE), 1997)
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      This paper introduces a novel technique for synthesis of speed-independent circuits from their Signal Transition Graph specifications. The new method uses partial order in the form of the STG-unfolding segment to derive ...
    • Programación de espacios de estados con Java en asignaturas de inteligencia artificial 

      Mandow, Lawrence (Universitat Oberta La Salle, 2015-07-08)
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      La representación mediante espacios de estados es un elemento central en los cursos sobre inteligencia artificial simbólica. Las prácticas de programación resultan muy importantes para la asimilación de este concepto. En ...
    • Verification of concurrent systems with parametric delays using octahedra 

      Clarisó Viladrosa, Robert; Cortadella, Jordi (Institute of Electrical and Electronics Engineers (IEEE), 2005)
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      A technique for the verification of concurrent parametric timed systems is presented. In the systems under study, each action has a bounded delay where the bounds are either constants or parameters. Given a safety property, ...