Exploració per tema "FPGA"

Ara es mostren els items 184-200 de 200

    • Sistema de adquisición y generación de señal basado en FPGA y placa embedded 

      López Casablanca, Sergio (Universitat Politècnica de Catalunya, 2017-07)
      Treball Final de Grau
      Accés obert

    • Sistema de digitalización controlado por FPGA para un radar embarcado en dron 

      Arroyo de Fàbregas, Adrià (Universitat Politècnica de Catalunya, 2018-06)
      Treball Final de Grau
      Accés obert
      Drones or UAV (Unmanned Aerial Vehicle) are aircraft without people aboard, which have civil and military applications. This thesis wants to be focused on the process of digitalization used in a project of UPC based on a ...

    • Slow-envelope shaping function FPGA implementation for 5G NR envelope tracking PA 

      Li, Wantao; Bartzoudis, Nikolaos; Rubio Fernández, José; López Bueno, David; Montoro López, Gabriel; Gilabert Pinal, Pere Lluís (Institute of Electrical and Electronics Engineers (IEEE), 2022)
      Comunicació de congrés
      Accés restringit per política de l'editorial
      This paper focuses on the FPGA implementation of a slew-rate reduction (SR) shaping function for envelope tracking (ET) power amplifiers (PAs). The SR envelope has been proved effective to trade-off power efficiency and ...

    • SNAVA: A Generic Threshold-Based-SNN Emulation Solution 

      Tiruvendipura Achyutha Raghavan, Athul Sripad (Universitat Politècnica de Catalunya, 2013-09-25)
      Projecte Final de Màster Oficial
      Accés obert
      [ANGLÈS] Spiking Neural Networks has been the focus of research of the decade. It has been proved possible to mimic several mechanisms of the mammalian brain with SNN models. Several dedicated hardware, both analog and ...

    • SNAVA—A real-time multi-FPGA multi-model spiking neural network simulation architecture 

      Sripad T A, Athul; Sánchez Rivera, Giovanny; Zapata Rodríguez, Mireya; Pirrone, Vito; Dorta Pérez, Silvestre Taho; Cambria, Salvatore; Marti, Albert; Krishnamourthy, Karthikeyan; Madrenas Boadas, Jordi (2018-01-01)
      Article
      Accés obert
      Spiking Neural Networks (SNN) for Versatile Applications (SNAVA) simulation platform is a scalable and programmable parallel architecture that supports real-time, large-scale, multi-model SNN computation. This parallel ...

    • Software de control para un prototipo de monitor óptico difuso en dominio frecuencial 

      Benet Revilla, Rubén (Universitat Politècnica de Catalunya, 2014-06-12)
      Projecte/Treball Final de Carrera
      Accés restringit per acord de confidencialitat

    • Soporte para depuración en FPGA 

      Meléndez Núñez, Christian (Universitat Politècnica de Catalunya, 2018-04-04)
      Treball Final de Grau
      Accés obert
      Describiremos la implementación de un soporte a la depuración llamado hgdb basado en la idea que sigue LegUp, un entorno de depuración orientado a la síntesis de alto nivel (HLS) que permite inspeccionar circuitos generados ...

    • Task scheduling sensitivity to L1 cache settings on an area-constrained 32-core RISC-V processor 

      Morais, Lucas; Jiménez-González, Daniel; Álvarez, Carlos (Barcelona Supercomputing Center, 2022-05)
      Text en actes de congrés
      Accés obert
      High-performance applications are highly sensitive to memory performance characteristics. While programs with comparatively low memory-to-computation ratio are less likely to be hampered by limited memory bandwidth, most ...

    • Task-based programming models for heterogeneous recurrent workloads 

      Bosch Pons, Jaume; Vidal, Miquel; Filgueras Izquierdo, Antonio; Jiménez González, Daniel; Álvarez Martínez, Carlos; Martorell Bofill, Xavier; Ayguadé Parra, Eduard (Springer Nature, 2021)
      Text en actes de congrés
      Accés obert
      This paper proposes the extension of task-based programming models with recurrent workloads concepts. The proposal introduces new clauses in the OmpSs task directive to efficiently model recurrent workloads. The clauses ...

    • Testbench development of a sigma-delta ADC converter chip 

      Garcia Cutillas, Izan (Universitat Politècnica de Catalunya, 2023-05-30)
      Projecte Final de Màster Oficial
      Accés obert
      Currently, there are several techniques to verify the operation of mixed-signal integrated circuits, however, most require that the chip itself contains the necessary hardware for it. If the verification circuitry is not ...

    • The AXIOM project: IoT on heterogeneous embedded platforms 

      Filgueras Izquierdo, Antonio; Vidal, Miquel; Mateu, Marc; Jiménez González, Daniel; Álvarez Martínez, Carlos; Martorell Bofill, Xavier; Ayguadé Parra, Eduard; Theodoropoulos, Dimitris; Pnevmatikatos, Dionisis; Gai, Paolo; Garzarella, Stefano; Oro de Herta, David; Hernando Pericás, Francisco Javier; Bettin, Nicola; Pomella, Alberto; Giorgi, Roberto (Institute of Electrical and Electronics Engineers (IEEE), 2019-11-11)
      Article
      Accés obert
      The AXIOM project aims at providing an environment for Cyber-Physical Systems. Smart Video Surveillance targets public environments, involving real-time face detection in crowds. Smart Home Living targets home environments ...

    • Towards reconfigurable accelerators in HPC: Designing a multipurpose eFPGA tile for heterogeneous SoCs 

      Hotfilter, Tim; Kreß, Fabian; Kempf, Fabian; Becker, Jürgen; Haro Ruiz, Juan Miguel de; Jiménez González, Daniel; Moretó Planas, Miquel; Álvarez Martínez, Carlos; Labarta Mancho, Jesús José; Baili, Imen (Institute of Electrical and Electronics Engineers (IEEE), 2022)
      Text en actes de congrés
      Accés obert
      The goal of modern high performance computing platforms is to combine low power consumption and high throughput. Within the European Processor Initiative (EPI), such an SoC platform to meet the novel exascale requirements ...

    • Upgraded Hardware Interface for Communication with the Power Supplies involved in the Fast Orbit Feedback at ALBA Synchrotron 

      Molas Pous, Bernat (Universitat Politècnica de Catalunya, 2023-06-29)
      Projecte Final de Màster Oficial
      Accés obert
      Realitzat a/amb:   Sincrotró ALBA
      The ALBA storage ring is equipped with a Fast Orbit Feedback (FOFB) system used to reach the submicron stability of the electron beam by compensating for small perturbations. Nonetheless, using obsolete hardware with limited ...

    • Verificación de los datos del calado de la distribución de un motor con CompactRIO 

      Gallego Ruiz, Miguel Ángel (Universitat Politècnica de Catalunya, 2006-02)
      Projecte/Treball Final de Carrera
      Accés restringit per decisió de l'autor
      El proyecto que nos ocupa trata de la automatización de un ensayo realizado a los motores de los vehículos de SEAT en su Centro Técnico. El ensayo consiste en la adquisición y posterior registro de los datos del calado ...

    • Versatile pulse-width modulator 

      Padilla Pérez, Miguel (Universitat Politècnica de Catalunya, 2013-12-19)
      Treball Final de Grau
      Accés obert

    • Virtualization of programmable switches on top of an FPGA board 

      Vilardell Barnosell, Albert (Universitat Politècnica de Catalunya, 2022-06-30)
      Treball Final de Grau
      Accés obert
      Realitzat a/amb:   University of Colorado Boulder
      El tràfic en la xarxa ha augmentat considerablement durant els darrers anys. Processar grans quantitats de dades sense comprometre el rendiment del sistema és tot un repte. Una tecnologia molt poderosa per administrar el ...

    • WFA-FPGA: An efficient accelerator of the wavefront algorithm for short and long read genomics alignment 

      Haghi, Abbas; Marco-Sola, Santiago; Álvarez Martí, Lluc; Diamantopoulos, Dionysios; Hagleitner, Christoph; Moretó Planas, Miquel (Elsevier, 2023-12)
      Article
      Accés restringit per política de l'editorial
      In the last years, advances in genome sequencing technologies have enabled the proliferation of genomic applications that guide personalized medicine. These applications have an enormous computational cost due to the large ...