Exploració per tema "data scrambling"
Ara es mostren els items 1-3 de 3
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Interleaved Scrambling Technique: A Novel Low-Power Security Layer for Cache Memories
(Institute of Electrical and Electronics Engineers (IEEE), 2014)
Comunicació de congrés
Accés restringit per política de l'editorialMemory systems security has increased over the last decade due to the sensitive information which is stored in plain text. Device specific attacks, such as cold-boot and sidechannel monitoring have been reported as being ... -
On the use of error detecting and correcting codes to boost security in caches against side channel attacks
(2015)
Text en actes de congrés
Accés obertMicroprocessor memory is sensitive to cold boot attacks. In this kind of attacks, memory remanence is exploited to download its content after the microprocessor has been struck by a hard boot. If just in this moment, a ... -
Random masking interleaved scrambling technique as a countermeasure for DPA/DEMA attacks in cache memories
(2016-11-15)
Text en actes de congrés
Accés obertMemory remanence in SRAMs and DRAMs is usually exploited through cold-boot attacks and the targets are the main memory and the L2 cache memory. Hence, a sudden power shutdown may give an attacker the opportunity to ...