Exploració per tema "Ordinadors -- Memòries semiconductores"
Ara es mostren els items 1-11 de 11
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Comparison of SRAM cells for 10-nm SOI FinFETs under process and environmental variations
(2012-12)
Article
Accés restringit per política de l'editorialWe explore the 6T and 8T SRAM design spaces through read static noise margin (RSNM), word-line write margin, and leakage for future 10-nm FinFETs. Process variations are based on the ITRS and modeled at device (TCAD) level. ... -
Enhancing 3T DRAMs for SRAM replacement under 10nm tri-gate SOI FinFETs
(IEEE Computer Society Publications, 2012)
Text en actes de congrés
Accés restringit per política de l'editorialIn this paper, we pr esent the dynamic 3T memory cell for future 10nm tri-gate FinFETs as a potential replacement for classical 6T SRAM cell for implementation in high speed cache memories. We investigate read access ... -
Estudi de viabilitat de l'actualització del HW d'una impressora de llarg format
(Universitat Politècnica de Catalunya, 2021-01)
Treball Final de Grau
Accés obertAvui en dia es busca optimitzar el màxim possible els recursos hardware. Actualment en alguns dels projectes d'HP hi ha un malbaratament de l'ús de les memòries que incorporen les FPGA que utilitzen ja que no hi ha cap ... -
Experience on material implication computing with an electromechanical memristor emulator
(IEEE Press, 2016)
Text en actes de congrés
Accés obertMemristors are being considered as a promising emerging device able to introduce new paradigms in both data storage and computing. In this paper the authors introduce the concept of a quasi-ideal experimental device that ... -
Heterogeneous memristive crossbar for in-memory computing
(Institute of Electrical and Electronics Engineers (IEEE), 2015)
Text en actes de congrés
Accés obertIt's been quite a while since scientists are seeking for the ancestor of von Neumann computing architecture. Among the most promising candidates, memristor demonstrates advantageous characteristics, which open new pathways ... -
Insights to memristive memory cell from a reliability perspective
(Institute of Electrical and Electronics Engineers (IEEE), 2015)
Text en actes de congrés
Accés obertThe scaling roadmap of devices under a more than Moore scenario is resulting in the emergence of new types of devices. Among them, memristors seem to be promising candidates to be suitable for various areas of application ... -
Memòries
(Asociación de Técnicos de Informática, 1980)
Article
Accés obert -
Memòries externes
(Asociación de Técnicos de Informática, 1980)
Article
Accés obert -
Power-efficient noise-Induced reduction of ReRAM cell’s temporal variability effects
(2021-04)
Article
Accés obertResistive Random Access Memory (ReRAM) is apromising novel memory technology for non-volatile storing, with low-power operation and ultra-high area density. However, ReRAM memories still face issues through commerciali ... -
RRAM variability and its mitigation schemes
(2016)
Text en actes de congrés
Accés obertEmerging technologies such as RRAMs are attracting significant attention due to their tempting characteristics such as high scalability, CMOS compatibility and non-volatility to replace the current conventional memories. ... -
Towards the simulation and emulation of large-scale hardware designs
(Universitat Politècnica de Catalunya, 2020-10-29)
Projecte Final de Màster Oficial
Accés obertThe heritage of Moore's law has converged in a heterogeneous processor with a many-core and different application- or domain-specific accelerators. Having also finished the benefits of Dennard scaling, we have ended up in ...