Ara es mostren els items 1-20 de 22

    • Architecting a secure wireless network-on-chip 

      Lebiednik, Brian; Abadal Cavallé, Sergi; Kwon, Hyoukjun; Krishna, Tushar (Institute of Electrical and Electronics Engineers (IEEE), 2018)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      With increasing integration in SoCs, the Network-on-Chip (NoC) connecting cores and accelerators is of paramount importance to provide low-latency and high-throughput communication. Due to limits to scaling of electrical ...
    • Area-efficient snoopy-aware NoC design for high-performance chip multiprocessor systems 

      Roca Pérez, Antoni; Hernández Gañán, Carlos; Lodde, Mario; Flich Cardo, José (2015-07-01)
      Article
      Accés obert
      Manycore CMP systems are expected to grow to tens or even hundreds of cores. In this paper we show that the effective co-design of both, the network-on-chip and the coherence protocol, improves performance and power meanwhile ...
    • Black-Box IP Validation with the SafeTI Traffic Injector: A Success Story 

      Fuentes, Francisco; Alcaide Portet, Sergi; Casanova, Raimon; Abella Ferrer, Jaume (Institute of Electrical and Electronics Engineers (IEEE), 2023)
      Comunicació de congrés
      Accés obert
      Functional and performance validation of high-performance safety-related hardware platforms require generating specific traffic patterns in the network-on-chip (NoC) to test IP components and their integration. Software-only ...
    • Characterization and modeling of multicast communication in cache-coherent manycore processors 

      Abadal Cavallé, Sergi; Martinez, Raul; Solé Pareta, Josep; Alarcón Cot, Eduardo José; Cabellos Aparicio, Alberto (2016-01-21)
      Article
      Accés obert
      The scalability of Network-on-Chip (NoC) designs has become a rising concern as we enter the manycore era. Multicast support represents a particular yet relevant case within this context, mainly due to the poor performance ...
    • Characterizing the spatio-temporal qubit traffic of a quantum intranet aiming at modular quantum computer architectures 

      Rodrigo Muñoz, Santiago; Spanò, Domenico; Bandic, Medina; Abadal Cavallé, Sergi; van Someren, Hans; Ovide, Anabel; Feld, Sebastian; García Almudever, Carmen; Alarcón Cot, Eduardo José (Association for Computing Machinery (ACM), 2022)
      Text en actes de congrés
      Accés obert
      Quantum many-core processors are envisioned as the ultimate solution for the scalability of quantum computers. Based upon Noisy Intermediate-Scale Quantum (NISQ) chips interconnected in a sort of quantum intranet, they ...
    • Computing and communications for the software-defined metamaterial paradigm: a context analysis 

      Abadal Cavallé, Sergi; Liaskos, Christos; Tsioliaridou, Ageliki; Ioannidis, Sotiris; Pitsillides, Andreas; Solé Pareta, Josep; Alarcón Gallo, Eduardo; Cabellos Aparicio, Alberto (Institute of Electrical and Electronics Engineers (IEEE), 2017-01-01)
      Article
      Accés obert
      Metamaterials are artificial structures that have recently enabled the realization of novel electromagnetic components with engineered and even unnatural functionalities. Existing metamaterials are specifically designed ...
    • Graphene-enabled wireless communication for massive multicore architectures 

      Abadal Cavallé, Sergi; Alarcón Cot, Eduardo José; Cabellos Aparicio, Alberto; Lemme, Max; Nemirovsky, Mario (2013-11-11)
      Article
      Accés restringit per política de l'editorial
      Current trends in microprocessor architecture design are leading towards a dramatic increase of core-level parallelization, wherein a given number of independent processors or cores are interconnected. Since the main ...
    • Graphene-enabled wireless networks-on-chip 

      Llatser Martí, Ignacio; Abadal Cavallé, Sergi; Mestres Sugrañes, Albert; Cabellos Aparicio, Alberto; Alarcón Cot, Eduardo José (Institute of Electrical and Electronics Engineers (IEEE), 2013)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      Graphene-enabled Wireless Communications (GWC) advocate for the use of graphene-based plasmonic antennas, or graphennas, which take advantage of the plasmonic properties of graphene to radiate electromagnetic waves in the ...
    • Interconnect fabrics for multi-core quantum processors: a context analysis 

      Escofet i Majoral, Pau; Ben Rached, Sahar; Rodrigo Muñoz, Santiago; García Almudever, Carmen; Alarcón Cot, Eduardo José; Abadal Cavallé, Sergi (Association for Computing Machinery (ACM), 2023)
      Text en actes de congrés
      Accés obert
      Quantum computing has revolutionized the field of computer science with its extraordinary ability to handle classically intractable problems. To realize its potential, however, quantum computers need to scale to millions ...
    • Medium access control in wireless network-on-chip: a context analysis 

      Abadal Cavallé, Sergi; Mestres Sugrañes, Albert; Torrellas, Josep; Alarcón Cot, Eduardo José; Cabellos Aparicio, Alberto (2018-06-01)
      Article
      Accés obert
      Wireless on-chip communication is a promising candidate to address the performance and efficiency issues that arise when scaling current NoC techniques to manycore processors. A WNoC can serve global and broadcast traffic ...
    • Modeling high-performance wormhole NoCs for critical real-time embedded systems 

      Panic, Milos; Hernández, Carles; Quiñones, Eduardo; Abella Ferrer, Jaume; Cazorla Almeida, Francisco Javier (Institute of Electrical and Electronics Engineers (IEEE), 2016)
      Text en actes de congrés
      Accés obert
      Manycore chips are a promising computing platform to cope with the increasing performance needs of critical real-time embedded systems (CRTES). However, manycores adoption by CRTES industry requires understanding task's ...
    • Network aware performance evaluation of prefetching techniques in CMPs 

      Torrents Lapuerta, Martí; Martinez Morais, Raul; Molina Clemente, Carlos (2014-06-01)
      Article
      Accés restringit per política de l'editorial
      This study focuses on the importance of quantifying the effect of prefetching on the interconnection network of a multiprocessor chip. This kind of microarchitectural effects are often quantified using simulators. However, ...
    • Networking challenges and prospective impact of broadcast-oriented wireless networkson- chip 

      Abadal Cavallé, Sergi; Nemirovsky, Mario; Alarcón Cot, Eduardo José; Cabellos Aparicio, Alberto (Association for Computing Machinery (ACM), 2015)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      The cost of broadcast has been constraining the design of manycore processors and of the algorithms that run upon them. However, as on-chip RF technologies allow the design of small-footprint and high-bandwidth antennas ...
    • On the area and energy scalability of wireless network-on-chip: a model-based benchmarked design space exploration 

      Abadal Cavallé, Sergi; Iannazzo Soteras, Mario Enrique; Nemirovsky, Mario; Cabellos Aparicio, Alberto; Lee, Heekwan; Alarcón Cot, Eduardo José (2014-07-02)
      Article
      Accés obert
      Networks-on-Chip (NoCs) are emerging as the way to interconnect the processing cores and the memory within a chip multiprocessor. As recent years have seen a significant increase in the number of cores per chip, it is ...
    • On the Impact of Heterogeneous NoC Bandwidth Allocation in the WCET of Applications 

      Cardona Nadal, Jordi (Universitat Politècnica de Catalunya, 2018-04-16)
      Projecte Final de Màster Oficial
      Accés obert
      Realitzat a/amb:   Barcelona Supercomputing Center / Barcelona Supercomputing Center
      This thesis analyzes the potential of a Flexible Bandwidth Allocation (FBA) method for networks-on-chip (NoCs), which provides heterogeneous bandwidth distribution to improve the worst-case execution time (WCET) of parallel ...
    • OpenPiton optimizations towards high performance manycores 

      Leyva Santes, Neiel Israel; Monemi, Alireza; Oliete Escuín, Noelia; López Paradís, Guillem; Abancens Calvo, Xabier; Balkind, Jonathan; Vallejo Gutiérrez, Enrique; Moretó Planas, Miquel; Álvarez Martí, Lluc (Association for Computing Machinery (ACM), 2023)
      Text en actes de congrés
      Accés obert
      In recent years, numerous multicore RISC-V platforms have emerged. Within the RISC-V ecosystem, Networks-on-Chip (NoCs) such as OpenPiton are employed in designs that aim to scale to a large number of cores. This paper ...
    • Opportunistic beamforming in wireless network-on-chip 

      Abadal Cavallé, Sergi; Marruedo, Adrián; Franques, Antonio; Taghvaee, Hamidreza; Cabellos Aparicio, Alberto; Zhou, Jin; Torrellas, Josep; Alarcón Cot, Eduardo José (Institute of Electrical and Electronics Engineers (IEEE), 2019)
      Text en actes de congrés
      Accés obert
      Wireless Network-on-Chip (WNoC) has emerged as a promising alternative to conventional interconnect fabrics at the chip scale. Since WNoCs may imply the close integration of antennas, one of the salient challenges in this ...
    • Physical-aware link allocation and route assignment for chip multiprocessing 

      Nikitin, Nikita; Chatterjee, Satrajit; Cortadella, Jordi; Kishinevsky, Michael; Ogras, Umit (Institute of Electrical and Electronics Engineers (IEEE), 2010)
      Text en actes de congrés
      Accés obert
      The architecture definition, design, and validation of the interconnect networks is a key step in the design of modern on-chip systems. This paper proposes a mathematical formulation of the problem of simultaneously defining ...
    • Physical-aware system-level design for tiled hierarchical chip multiprocessors 

      Cortadella, Jordi; San Pedro Martín, Javier de; Nikitin, Nikita; Petit Silvestre, Jordi (ACM Press. Association for Computing Machinery, 2013)
      Text en actes de congrés
      Accés obert
      Tiled hierarchical architectures for Chip Multiprocessors (CMPs) represent a rapid way of building scalable and power-e fficient many-core computing systems. At the early stages of the design of a CMP, physical parameters ...
    • Scalability of Broadcast Performance in Wireless Network-on-Chip 

      Abadal Cavallé, Sergi; Mestres Sugrañes, Albert; Nemirovsky, Mario; Lee, Heekwan; Gonzalez, Antonio; Alarcón Cot, Eduardo José; Cabellos Aparicio, Alberto (IEEE, 2016-12-01)
      Article
      Accés obert
      Networks-on-Chip (NoCs) are currently the paradigm of choice to interconnect the cores of a chip multiprocessor. However, conventional NoCs may not suffice to fulfill the on-chip communication requirements of processors ...