Exploració per tema "Integrated circuits."

Ara es mostren els items 1-3 de 3

    • An ultra low-power mixed-signal back-end for passive sensor UHF RFID transponders 

      Rodriguez, J.; Delgado Restituto, M.; Masuch, J.; Rodriguez Perez, Alberto; Alarcón Cot, Eduardo José; Rodríguez Vázquez, Ángel (IEEE Press. Institute of Electrical and Electronics Engineers, 2012-02)
      Article
      Accés restringit per política de l'editorial
      This paper describes the design of mixed-signal back end for an ultrahigh-frequency sensor-enabled radio-frequency identification transponder in full compliance with the Electronic Product Code Class-1 Generation-2 protocol, ...

    • Design of complex circuits using the via-configurable transistor array regular layout fabric 

      Pons Solé, Marc; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier; González Colás, Antonio María (IEEE Computer Society Publications, 2011)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      Layout regularity will be mandatory for future CMOS technologies to mitigate manufacturability issues. However, existing CAD tools do not meet the needs imposed by regularity constraints. In this paper we present a new ...

    • Process variability in sub-16nm bulk CMOS technology 

      Rubio Sola, Jose Antonio; Figueras Pàmies, Joan; Vatajelu, Elena Ioana; Canal Corretger, Ramon (2012-03-01)
      Report de recerca
      Accés obert
      The document is part of deliverable D3.6 of the TRAMS Project (EU FP7 248789), of public nature, and shows and justifies the levels of variability used in the research project for sub-18nm bulk CMOS technologies.