Exploració per tema "Hardware-software codesign"

Ara es mostren els items 1-8 de 8

    • A co-designed HW/SW approach to general purpose program acceleration using a programmable functional unit 

      Deb, Abhishek; Codina Viñas, Josep M.; González Colás, Antonio María (IEEE Press. Institute of Electrical and Electronics Engineers, 2011)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      In this paper, we propose a novel programmable functional unit (PFU) to accelerate general purpose application execution on a modern out-of-order x86 processor in a complexity-effective way. Code is transformed and ...

    • A HW/SW codesign-based reconfigurable environment for telecommunication network simulation 

      Noguera, Juan José; Badia Sala, Rosa Maria; Domingo Pascual, Jordi; Solé Pareta, Josep (Springer, 1999)
      Capítol de llibre
      Accés restringit per política de l'editorial
      Sequential network simulation is a high time-consuming application, and with the emergence of global multihop networks and gigabit-per-second links is becoming a challenging problem. A new approach to this open problem is ...

    • A software-hardware hybrid steering mechanism for clustered microarchitectures 

      Cai, Qiong; Codina Viñas, Josep M.; González González, José; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2008)
      Text en actes de congrés
      Accés obert
      Clustered microarchitectures provide a promising paradigm to solve or alleviate the problems of increasing microprocessor complexity and wire delays. High- performance out-of-order processors rely on hardware-only steering ...

    • AXIOM: a hardware-software platform for cyber physical systems 

      Mazumdar, Somnath; Ayguadé Parra, Eduard; Bettin, Nicola; Bueno Hedo, Javier; Ermini, Sara; Filgueras Izquierdo, Antonio; Jiménez González, Daniel; Álvarez Martínez, Carlos; Martorell Bofill, Xavier; Montefoschi, Francesco; Oro Garcia, David; Pnevmatikatos, Dionisis; Rizzo, Antonio; Theodoropoulos, Dimitris; Giorgi, Roberto (2016)
      Text en actes de congrés
      Accés restringit per política de l'editorial
      Cyber-Physical Systems (CPSs) are widely necessary for many applications that require interactions with the humans and the physical environment. A CPS integrates a set of hardware-software components to distribute, execute ...

    • Enabling SMT for real-time embedded systems 

      Cazorla Almeida, Francisco Javier; Knijnenburg, Peter M.W.; Sakellariou, Rizos; Fernandez Prieto, Enrique; Ramírez Bellido, Alejandro; Valero Cortés, Mateo (Institute of Electrical and Electronics Engineers (IEEE), 2004)
      Text en actes de congrés
      Accés obert
      In order to deal with real time constraints, current embedded processors are usually simple in-order processors with no speculation capabilities to ensure that execution times of applications are predictable. However, ...

    • HW/SW co-designed processors: Challenges, design choices and a simulation infrastructure for evaluation 

      Kumar, Rakesh; Cano, José; Brankovic, Aleksandar; Pavlou, Demos; Stavrou, Kyriakos; Gibert Codina, Enric; Martínez, Alejandro; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2017)
      Text en actes de congrés
      Accés obert
      Improving single thread performance is a key challenge in modern microprocessors especially because the traditional approach of increasing clock frequency and deep pipelining cannot be pushed further due to power constraints. ...

    • Quantitative characterization of the software layer of a HW/SW co-designed processor 

      Cano Reyes, José; Kumar, Rakesh; Brankovic, Aleksandar; Pavlou, Demos; Stavrou, Kyriakos; Gibert Codina, Enric; Martínez, Alejandro; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2016)
      Text en actes de congrés
      Accés obert
      HW/SW co-designed processors currently have a renewed interest due to their capability to boost performance without running into the power and complexity walls. By employing a software layer that performs dynamic binary ...

    • Removing checks in dynamically typed languages through efficient profiling 

      Dot, Gem; Martinez, Alejandro; González Colás, Antonio María (Institute of Electrical and Electronics Engineers (IEEE), 2017)
      Text en actes de congrés
      Accés obert
      Dynamically typed languages increase programmer's productivity at the expense of some runtime overheads to manage the types of variables, since they are not declared at compile time and can change at runtime. One of the ...